Some embodiments include a thermal management system for a nanosecond pulser. In some embodiments, the thermal management system may include a switch cold plates coupled with switches, a core cold plate coupled with one or more transformers, resistor cold plates coupled with resistors, or tubing coupled with the switch cold plates, the core cold plates, and the resistor cold plates. The thermal management system may include a heat exchanger coupled with the resistor cold plates, the core cold plate, the switch cold plate, and the tubing. The heat exchanger may also be coupled with a facility fluid supply.

A plasma processing apparatus includes a stage for supporting a target object in a chamber defined by a chamber body. The stage includes a lower electrode, an electrostatic chuck provided on the lower electrode, heaters provided in the electrostatic chuck, and terminals electrically connected to the heaters. A conductor pipe electrically connects a high frequency power supply and the lower electrode and extends from the lower electrode to the outside of the chamber body. Power supply lines supply power from a heater controller to the heaters. Filters partially forming the power supply lines prevent the inflow of high frequency power from the heaters to the heater controller. The power supply lines include wirings which respectively connect the terminals and the filters and extend to the outside of the chamber body through an inner bore of the conductor pipe.

A method for plasma ion processing is described, including flowing a gas into porous material; and exposing the gas to a pulsed electric field whilst the gas is in the pores. The pulsed electric field ionises the gas to generate a plasma. The method may additionally include exposing the porous material to a gas so as to generate functionality. The method may additionally include exposing the functionalised porous material to a functional species so as to covalently attach said functional species to the surfaces of the pores.

A ceramic heater includes a ceramic substrate including, on an upper surface, a wafer mount surface that receives a wafer, and a heater electrode embedded in an inside of the ceramic substrate. The ceramic substrate includes a core portion and a surface layer portion disposed on a surface of the core portion. The surface layer portion has volume resistivity higher than volume resistivity of the core portion. The core portion has thermal conductivity higher than thermal conductivity of the surface layer portion. The surface layer portion is disposed over an area of at least one of a side surface of the core portion and an upper surface of the core portion, the area being not covered with the wafer.

Embodiments of the present disclosure provide a semiconductor processing apparatus and a dielectric window cleaning method of the semiconductor processing apparatus. The semiconductor apparatus includes a reaction chamber and a dielectric window arranged in the reaction chamber, an induction coil and a cleaning electrode, both located above the dielectric window, a radio frequency (RF) source assembly configured to apply RF power to the induction coil and the cleaning electrode, an impedance adjustment assembly electrically being connected to the cleaning electrode and being in an on-off connection to the output terminal of the RF source assembly, and the impedance adjustment assembly being configured to adjust the impedance between the output terminal of the RF source assembly and the cleaning electrode to cause the impedance to be greater than or smaller than the first predetermined value to disconnect or connect the impedance adjustment assembly and the output terminal of the RF source assembly. The semiconductor processing apparatus and the dielectric window cleaning method of the semiconductor processing apparatus of embodiments of the present disclosure can achieve a physical cleaning effect and a chemical cleaning effect at simultaneously on a basis of performing cleaning on the dielectric window. Thus, the cleaning efficiency of the dielectric window is effectively improved.

A plasma source is provided that includes a body defining an input port, an output port, and at least one discharge section extending along a central longitudinal axis between the input port and the output port. The at least one discharge section includes a return electrode defining a first generally cylindrical interior volume having a first interior diameter, a supply plate comprising a supply electrode, the supply plate defining a second generally cylindrical interior volume having a second interior diameter, and at least one spacer defining a third generally cylindrical interior volume having a third interior diameter. The third interior diameter is different from the first or second interior diameter. The at least one discharge section is formed from the spacer arranged between the return electrode and the supply plate along the central longitudinal axis to define a generally cylindrical discharge gap for generating a plasma therein.

A method for forming a semiconductor device structure is provided. The method includes placing a substrate including a material layer thereon in a plasma chamber. The plasma chamber includes a housing, a first electrode array including a plurality of first sub-electrodes, a plurality of first matching units each electrically connected to one of the first sub-electrodes, and a second electrode array disposed in the housing, the second electrode array including a plurality of second sub-electrodes. The method also includes supplying an etching gas into the plasma chamber and applying a first RF power source to the first sub-electrodes of the first electrode array by the first matching units to form an etching plasma from the etching gas. The method further includes adjusting a distance between each of the first sub-electrodes and the substrate to generate a plasma density distribution across the substrate.

This application provides a plate for a semiconductor processing apparatus, the plate including a first electrode and a second electrode, where the first electrode is selectively coupled to a first ground terminal via a first switch, the second electrode is selectively coupled to a second ground terminal via a second switch, and the first electrode and the second electrode are electrically isolated from each other.

There is provided a plasma processing apparatus comprising: a plasma processing chamber; a substrate support disposed in the plasma processing chamber, the substrate support including: a base, a ceramic member disposed on the base and having a substrate support surface and a ring support surface, one more annular members disposed on the ring support surface to surround a substrate on the substrate support surface, first and second central electrodes inserted into the ceramic member, first to fourth vertical connectors inserted into the ceramic member, first and second annular connectors inserted into the ceramic member, and a central heater electrode inserted into the ceramic member; a DC power source electrically connected to an outer region of the first annular connector through the third vertical connector; and a voltage pulse generator electrically connected to an outer region of the second annular connector through the fourth vertical connector.

Methods of forming structures including a photoresist underlayer and an adhesion layer and structures including the photoresist underlayer and adhesion layer are disclosed. Exemplary methods include forming the photoresist underlayer and forming an adhesion layer using a cyclical deposition process. The adhesion layer can be formed within the same reaction chamber used to form the photoresist underlayer.