Patent classifications
H01J37/3255
PLASMA PROCESSING APPARATUS AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING THE SAME
A plasma processing apparatus includes: an electrostatic chuck supporting a wafer, and connected to a first power supply, an edge ring disposed to surround an edge of the electrostatic chuck and formed of a material having a first resistivity value, a dielectric ring supporting a lower portion of the edge ring, formed of a material having a second resistivity value lower than that of the first resistivity value, and connected to a second power supply, and an electrode ring disposed in a region overlapping the dielectric ring, in contact with a lower surface of the edge ring, and formed of a material having a third resistivity value greater than the first resistivity value, wherein the third resistivity value is a value of 90 Ωcm to 1000 Ωcm.
Substrate support and plasma processing apparatus
A substrate support for use in a plasma processing chamber includes a substrate support body, a lifter pin and a lift mechanism. The substrate support body has a pin through-hole and the pin through-hole has a female-threaded inner wall. The lifter pin has a base segment, an intermediate segment, and a leading segment. The lifter pin is inserted into the pin through-hole, the intermediate segment is male-threaded, and the male-threaded intermediate segment is screwable to the female-threaded inner wall. The lift mechanism is configured to vertically move the lifter pin relative to the substrate support body.
Stage and plasma processing apparatus
A stage includes an electrostatic chuck that supports a substrate and an edge ring; and a base that supports the electrostatic chuck. The electrostatic chuck includes a first region having a first upper surface and supports the substrate placed on the first upper surface; a second region having a second upper surface, provided integrally around the first region, and supports the edge ring placed on the second upper surface; a first electrode provided in the first region to apply a DC voltage; a second electrode provided in the second region to apply a DC voltage, and a third electrode to apply a bias power.
METHODS AND APPARATUSES FOR DEPOSITION OF ADHERENT CARBON COATINGS ON INSULATOR SURFACES
Deposition of adherent carbon coating(s) on insulator surface(s) can include pretreatment of the insulator surface(s) in a pretreatment plasma (15) generated by a second power generator (11) in an auxiliary magnetic field in a second gas (14), and deposition of carbon coatings onto pretreated insulator surface(s) with the aid of a hollow cathode. The deposition onto the pretreated insulator surface(s) can include deposition by PVD from the hollow cathode simultaneously with PE CVD in a hollow cathode plasma (16) generated in a second gas (13). The second gas 13 can comprise one or more hydrocarbons. The insulator surfaces can include glass or ceramics.
TEXTURED SILICON SEMICONDUCTOR PROCESSING CHAMBER COMPONENTS
Textured silicon components of a semiconductor processing chamber having hillock-shaped or pyramid-shaped structures on its surface, and a method of texturing such silicon components. The silicon component can be selectively textured using chemical means to form the hillock-shaped structures to increase the surface area of the silicon component to improve polymer adhesion.
ELECTRON SOURCE WITH MAGNETIC SUPPRESSOR ELECTRODE
An electron source is disclosed. The electron source may include an electron emitter configured to generate one or more electron beams. The electron source may further include a magnetic suppressor electrode surrounding at least a portion of the electron emitter. The magnetic suppressor electrode may be formed from one or more magnetic materials. The magnetic suppressor may be configured to shield at least a portion of the electron emitter from an axial magnetic field. The electron source may further include an extractor electrode positioned adjacent to a tip of the electron emitter.
THREAD PROFILES FOR SEMICONDUCTOR PROCESS CHAMBER COMPONENTS
Embodiments of components for use in substrate process chambers are provided herein. In some embodiments, a component for use in a substrate process chamber includes: a body having an opening extending partially through the body from a top surface of the body, wherein the opening includes a threaded portion for fastening the body to a second process chamber component, wherein the threaded portion includes a plurality of threads defining a plurality of rounded crests and a plurality of rounded roots, and wherein a depth of the threaded portion, being a radial distance between a rounded crest of the plurality of rounded crests and an adjacent root of the plurality of rounded roots, decreases from a first depth to a second depth at a last thread of the plurality of threads.
PLASMA SOURCE WITH FLOATING ELECTRODES
A plasma source assembly for use with a substrate processing chamber is described. The assembly includes a spring which is disposed between electrodes and a dielectric ring.
VACUUM TREATMENT APPARATUS AND METHOD FOR VACUUM PLASMA TREATING AT LEAST ONE SUBSTRATE OR FOR MANUFACTURING A SUBSTRATE
In a vacuum treatment recipient, a plasma is generated between a first plasma electrode and a second plasma electrode so as to perform a vacuum plasma treatment of a substrate. To minimize at least one of the two plasma electrodes to be buried by a deposition of material resulting from the treatment process, that electrode is provided with a surface pattern of areas which do not contribute to the plasma electrode effect and of areas which are plasma electrode effective. The current path between the two electrodes is concentrated on the distinct areas which are plasma electrode effective, leading to an ongoing sputter- cleaning of these areas.
Base conducting layer beneath graphite layer of ceramic cathode for use with cathodic arc deposition
Cathode structures are disclosed for use with pulsed cathodic arc deposition systems for forming diamond-like carbon (DLC) films on devices, such as on the sliders of hard disk drives. In illustrative examples, a base layer composed of an electrically- and thermally-conducting material is provided between the ceramic substrate of the cathode and a graphitic paint outer coating, where the base layer is a silver-filled coating that adheres to the ceramic rod and the graphitic paint. The base layer is provided, in some examples, to achieve and maintain a relatively low resistance (and hence a relatively high conductivity) within the cathode structure during pulsed arc deposition to avoid issues that can result from a loss of conductivity within the graphitic paint over time as deposition proceeds. Examples of suitable base material compounds are described herein where, e.g., the base layer can withstand temperatures of 1700° F. (927° C.).