Patent classifications
H01J37/3255
MANUFACTURING METHOD OF RING-SHAPED ELEMENT FOR ETCHER
A manufacturing method of a ring-shaped element for an etcher, comprises a granulation operation comprising i) a slurry manufacturing process of preparing a slurry by mixing a raw material including boron carbide, a sinterability enhancer with a solvent; and ii) a granulation process of drying the slurry to prepare granulated raw material; a molding operation of manufacturing a green body by molding the granulated raw material; a sintering operation of carbonizing and sintering the green body to manufacture a sintered body; a shape operation of shaping the sintered body to a ring-shaped element for an etcher. The sinterability enhancer comprises one selected from the group consisting of carbon, boron oxide and combinations thereof.
Active gas generation apparatus
In the present invention, a high-voltage side electrode component further includes a conductive film disposed on an upper surface of a dielectric electrode independently of a metal electrode. The conductive film is disposed between at least one gas ejection port and the metal electrode in plan view, and the conductive film is set to ground potential.
METHOD AND APPARATUS TO REDUCE FEATURE CHARGING IN PLASMA PROCESSING CHAMBER
Embodiments provided herein include an apparatus and methods for the plasma processing of a substrate in a processing chamber. In some embodiments, aspects of the apparatus and methods are directed to reducing defectivity in features formed on the surface of the substrate, improving plasma etch rate, and increasing selectivity of etching material to mask and/or etching material to stop layer. In some embodiments, the apparatus and methods enable processes that can be used to prevent or reduce the effect of trapped charges, disposed within features formed on a substrate, on the etch rate and defect formation. In some embodiments, the plasma processing methods include the synchronization of the delivery of pulsed-voltage (PV) waveforms, and alternately the delivery of a PV waveform and a radio frequency (RF) waveform, so as to allow for the independent control of generation of electrons that are provided, during one or more stages of a PV waveform cycle, to neutralize the trapped charges formed in the features formed on the substrate.
Upper electrode and plasma processing apparatus
In an exemplary embodiment, an upper electrode is disposed in a processing chamber to face a susceptor and provided with a plate-like member and an electrode part. In an exemplary embodiment, the plate-like member is formed with a gas distribution hole that distributes a processing gas used for a plasma processing. The electrode part is formed in a film shape by thermally spraying silicon onto a surface of the plate-like member where an outlet of the gas distribution hole is formed.
Computer storage medium to perform a substrate treatment method using a block copolymer containing a hydrophilic and hydrophobic copolymers
A substrate treatment method of treating a substrate using a block copolymer containing a hydrophilic polymer and a hydrophobic polymer, includes: a resist pattern formation step of forming a predetermined resist pattern by a resist film on the substrate; a thin film formation step of forming a thin film for suppressing deformation of the resist pattern on a surface of the resist pattern; a block copolymer coating step of applying a block copolymer to the substrate after the formation of the thin film; and a polymer separation step of phase-separating the block copolymer into the hydrophilic polymer and the hydrophobic polymer.
Wafer support table with ceramic substrate including core and surface layer
A ceramic heater includes a ceramic substrate including, on an upper surface, a wafer mount surface that receives a wafer, and a heater electrode embedded in an inside of the ceramic substrate. The ceramic substrate includes a core portion and a surface layer portion disposed on a surface of the core portion. The surface layer portion has volume resistivity higher than volume resistivity of the core portion. The core portion has thermal conductivity higher than thermal conductivity of the surface layer portion. The surface layer portion is disposed over an area of at least one of a side surface of the core portion and an upper surface of the core portion, the area being not covered with the wafer.
INTERLOCKING FASTENING UPPER ELECTRODE ASSEMBLY HAVING IMPROVED FASTENING FORCE, AND PLASMA DEVICE INCLUDING SAME
An interlocking fastening upper electrode assembly having an improved fastening force is proposed. The assembly is configured such that a bush inserted into a silicon electrode protrudes above the silicon electrode, and the protruding portion is inserted into and coupled to an anodizing plate so as to suppress rotation of the bush, the assembly including: an inner and outer tab composite nut coupled to an assembly groove of the silicon electrode and an anodizing plate so as to prevent rotation; an inner and outer tab nut assembled in the assembly groove of the silicon electrode and fitted to the outside of the inner and outer tab composite nut; and an assembly module coupled through the inside of a through part of the anodizing plate and assembled with the inner and outer tab composite nut in order to fix the anodizing plate provided above the silicon electrode.
METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE
A method for forming a semiconductor device structure is provided. The method includes placing a substrate including a material layer thereon in a plasma chamber. The plasma chamber includes a housing, a first electrode array including a plurality of first sub-electrodes, a plurality of first matching units each electrically connected to one of the first sub-electrodes, and a second electrode array disposed in the housing, the second electrode array including a plurality of second sub-electrodes. The method also includes supplying an etching gas into the plasma chamber and applying a first RF power source to the first sub-electrodes of the first electrode array by the first matching units to form an etching plasma from the etching gas. The method further includes adjusting a distance between each of the first sub-electrodes and the substrate to generate a plasma density distribution across the substrate.
METHODS AND APPARATUS FOR CURING DIELECTRIC MATERIAL
Methods and apparatus for forming an integrated circuit structure, comprising: delivering a process gas to a process volume of a process chamber; applying low frequency RF power to an electrode formed from a high secondary electron emission coefficient material disposed in the process volume; generating a plasma comprising ions in the process volume; bombarding the electrode with the ions to cause the electrode to emit electrons and form an electron beam; and contacting a dielectric material with the electron beam to cure the dielectric material, wherein the dielectric material is a flowable chemical vapor deposition product. In embodiments, the curing stabilizes the dielectric material by reducing the oxygen content and increasing the nitrogen content of the dielectric material.
METHOD FOR CONDITIONING SEMICONDUCTOR PROCESSING CHAMBER COMPONENTS
A method for making a component for use in a semiconductor processing chamber is provided. A component body is formed from a conductive material having a coefficient of thermal expansion of less than 10.0×10.sup.−6/K. A metal oxide layer is then disposed over a surface of the component body.