The substrate joining method is a substrate joining method for joying two substrates, including a hydrophilic treatment step of hydrophilizing at least one of respective joint surfaces of the two substrates that are to be joined to each other and a joining step of joining the two substrates after the hydrophilic treatment step. The hydrophilic treatment step includes a step of performing a N.sub.2 RIE treatment to perform reactive ion etching using N.sub.2 gas on the joint surfaces of the substrates and a step of performing a N.sub.2 radical treatment to irradiate the joint surfaces of the substrates with N.sub.2 radicals after the step of performing the N.sub.2 RIE treatment.

A method for formation of monolithic nanostructures on an implantable device includes: a. depositing a metal film to a surface of the implantable device; b. heating the metal film for a period of time, such that the metal film transforms into multiple discrete nanoparticles, the multiple nanoparticles thereby forming an etch mask on the surface of the implantable device; c. etching the implantable device such that the surface of the implantable device is etched through the etch mask, thereby forming monolithic nanostructures in the surface of the implantable device; and d. (optionally) removing the etch mask, such as by immersion in an aqua regia solution.

A Faraday shielding apparatus includes a Faraday shielding plate and a resistance wire attached to the lower end of the Faraday shielding plate; the Faraday shielding plate includes a conductive ring and a plurality of conductive petal-shaped members radially symmetrically connected to the outer periphery of the conductive ring; and an insulating and thermally conductivity layer is on the outer surface of the resistance wire. During the etching process, the heating circuit and the resistance wire are conductively connected, increasing the temperature of the resistance wire when it is energized. The Faraday shielding plate is between a radio frequency coil and the resistance wire to form a shield. The output terminal of the heating power supply is filtered by way of a filter circuit unit, then is connected to the resistance wire, preventing coupling between the radio frequency coil and the resistance wire.

An ion source baffle includes a baffle body, wherein the baffle body is of a hollow structure; baffles are symmetrically fixedly arranged on an inner wall of the baffle body; the baffles extend towards the center of the baffle body; and in the direction from the inner wall of the baffle body towards the center of the baffle body, a shielding area formed by the baffles is reduced. The ion etching machine includes a discharge chamber, a reaction chamber and an ion source baffle, wherein the ion source baffle is clamped on an inner wall of the discharge chamber; and plasma sequentially passes through the ion source baffle and an ion source grid assembly. In the ion etching machine, the ion source baffle is additionally provided, such that after plasma is shielded by the ion source baffle.

Disclosed is a plasma etching method. The plasma etching method comprises: a first step for evaporating liquid perfluoropropyl carbinol (PPC); a second step for supplying a discharge gas including the evaporated PPC and argon gas to a plasma chamber in which an object to be etched is arranged; and a third step for discharging the discharge gas to generate plasma, and using the plasma to plasma-etch the object to be etched.

Electrostatic chucks with reduced current leakage and methods of dicing semiconductor wafers are described. In an example, an etch apparatus includes a chamber, and a plasma source within or coupled to the chamber. An electrostatic chuck is within the chamber. The electrostatic chuck includes a conductive pedestal having a plurality of notches at a circumferential edge thereof. The electrostatic chuck also includes a plurality of lift pins corresponding to ones of the plurality of notches.

A plasma etching apparatus includes a chuck configured to support a wafer, and a voltage application unit. The voltage application unit includes a first voltage application part configured to apply a first voltage to the wafer on the chuck, and a second voltage application part configured to apply a second voltage to the wafer on the chuck, the second voltage being different from the first voltage.

Disclosed is a plasma processing method for processing a workpiece that includes: a silicon-containing etching target layer, an organic film provided on the etching target layer, an antireflective film provided on the organic layer, and a first mask provided on the antireflective layer, using a plasma processing apparatus having a processing container. The plasma processing method includes: etching the antireflective film using plasma generated in the processing container and the first mask to form a second mask from the antireflective film; etching the organic film using plasma generated in the processing container and the second mask to form a third mask from the organic film; generating plasma of a mixed gas including the first gas and the second gas in the processing container; and etching the etching target layer using plasma generated in the processing container and the third mask.

A method for etching a curved substrate is provided, including: forming a conductive thin film layer with an etched pattern on the curved substrate; supplying power to the conductive thin film layer such that the conductive thin film layer has an equal potential at each position of the conductive thin film layer; etching each position of the curved substrate to an etching depth corresponding to the potential at each position of the conductive thin film layer based on the etched pattern of the conductive thin film layer, so as to obtain the curved substrate having a consistent etching depth at each position of the curved substrate. With the etching method, it is possible to etch an arbitrary curved surface to obtain a microstructure with a uniform processing depth.

A method for performing a feedback sequence for patterning CD control. The method including performing a series of process steps on a wafer to obtain a plurality of features, wherein a process step is performed under a process condition. The method including measuring a dimension of the plurality of features after performing the series of process steps. The method including determining a difference between the dimension that is measured and a target dimension for the plurality of features. The method including modifying the process condition for the process step based on the difference and a sensitivity factor for the plurality of features relating change in dimension and change in process condition.