An impedance match housing is described. The impedance match housing includes an impedance matching circuit having an input that is coupled to a radio frequency (RF) generator. The impedance matching circuit has an output that is coupled to a first RF strap. The impedance match housing includes a uniformity control circuit coupled in parallel to a portion of the first RF strap to modify uniformity in a processing rate of a substrate when the substrate is processed within a plasma chamber.

A method for manufacturing a semiconductor structure includes disposing a wafer in a processing chamber, in which the wafer is laterally surrounded by a focus ring. A plasma is formed in the processing chamber to process the wafer. A thickness of the focus ring is detected. A plasma direction of the plasma over a peripheral region of the wafer is adjusted according to the thickness of the focus ring.

A substrate support is provided, is configured to support a substrate in a plasma processing chamber, and includes first, second and third insulative layers, conduits and leads. The first insulative layer includes heater zones arranged in rows and columns. The second insulative layer includes conductive vias. First ends of the conductive vias are connected respectively to the heater zones. Second ends of the conductive vias are connected respectively to power supply lines. The third insulative layer includes power return lines. The conduits extend through the second insulative layer and into the third insulative layer. The leads extend through the conduits and connect to the heater zones. The heater zones are connected to the power return lines by the leads and are configured to heat corresponding portions of the substrate to provide a predetermined temperature profile across the substrate during processing of the substrate in the plasma processing chamber.

An apparatus configured to remove metal etch byproducts from the surface of substrates and from the interior of a substrate processing chamber. A plasma is used in combination with a solid state light source, such as an LED, to desorb metal etch byproducts. The desorbed byproducts may then be removed from the chamber.

The plasma processing apparatus includes a first electrode to which high frequency power is applied, a second electrode that functions as a counter electrode with respect to the first electrode, and a controller configured to control distribution of plasma generated between the first electrode and the second electrode. The first electrode is, for example, an upper electrode. The second electrode includes a lower electrode, and a peripheral portion disposed around the lower electrode. The peripheral portion includes a plurality of split electrodes divided in a peripheral direction. For each split electrode, the controller controls an impedance between the plasma and a ground via the split electrode.

An etching apparatus includes a controller configured to control a high frequency power supply to supply a high frequency power to a mounting table for etching a polymer layer formed on a base layer placed on the mounting table, using plasma generated from a predetermined gas supplied from a gas supply source by the high frequency power, the polymer layer having a periodic pattern of a first polymer and a second polymer formed by self-assembling the first polymer and the second polymer of a block copolymer that is capable of being self-assembled, the high frequency power being set for etching the polymer layer using the generated plasma such that the second polymer is removed and a pattern of the first polymer is formed for subsequently etching the base layer using the pattern of the first polymer as a mask.

A plasma processing apparatus 1 includes a chamber 10, a mounting table 16, a focus ring 24a, a first electrode plate 36 and a second electrode plate 35. The focus ring 24a is provided around the mounting table 16 to surround a mounting surface of the mounting table 16. The first electrode plate 36 is provided above the mounting table 16. The second electrode plate 35 is provided around the first electrode plate 36 to surround the first electrode plate 36 and is insulated from the first electrode plate 36. The plasma processing apparatus 1, in a first process, performs a preset processing on a semiconductor wafer W mounted on the mounting surface with plasma generated within the chamber, and, in a second process, increases an absolute value of a negative DC voltage applied to the second electrode plate 35 depending on an elapsed time of the first process.

A method for manufacturing a semiconductor structure includes disposing a wafer in a processing chamber, in which the wafer is laterally surrounded by a focus ring. A plasma is formed in the processing chamber to process the wafer. A thickness of the focus ring is detected. A plasma direction of the plasma over a peripheral region of the wafer is adjusted according to the thickness of the focus ring.

An impedance match housing is described. The impedance match housing includes an impedance matching circuit having an input that is coupled to a radio frequency (RF) generator. The impedance matching circuit has an output that is coupled to a first RF strap. The impedance match housing includes a uniformity control circuit coupled in parallel to a portion of the first RF strap to modify uniformity in a processing rate of a substrate when the substrate is processed within a plasma chamber.

In a method of manufacturing a semiconductor device, an underlying structure is formed over a substrate. A film is formed over the underlying structure. Surface topography of the film is measured and the surface topography is stored as topography data. A local etching is performed by using directional etching and scanning the substrate so that an entire surface of the film is subjected to the directional etching. A plasma beam intensity of the directional etching is adjusted according to the topography data.