A method for manufacturing a semiconductor device includes a step of preparing a SiC substrate, a step of fixing the SiC substrate on an electrostatic chuck and heat-treating the SiC substrate, and a step of performing ion implantation treatment on the SiC substrate fixed on the electrostatic chuck and heat-treated. The step of heat-treating includes an outer circumferential-side chucking step which generates an electrostatic attraction force between an outer circumferential region of the SiC substrate and an outer circumferential portion of the electrostatic chuck, the outer circumferential portion facing the outer circumferential region, and an inner circumferential-side chucking step which is started after the outer circumferential-side chucking step is started, and generates an electrostatic attraction force between an inner circumferential region of the SiC substrate and an inner circumferential portion of the electrostatic chuck, the inner circumferential portion facing the inner circumferential region.

A method for slicing a crystalline material ingot includes providing a crystalline material boule characterized by a cropped structure including a first end-face, a second end-face, and a length along an axis in a first crystallographic direction extending from the first end-face to the second end-face. The method also includes cutting the crystalline material boule substantially through a first crystallographic plane in parallel to the axis to separate the crystalline material boule into a first portion with a first surface and a second portion with a second surface. The first surface and the second surface are planar surfaces substantially along the first crystallographic plane. The method further includes exposing either the first surface of the first portion or the second surface of the second portion, and performing a layer transfer process to form a crystalline material sheet from either the first surface of the first portion or from the second surface of the second portion.

A method of manufacturing a semiconductor device includes forming a memory stack on a cell wafer, the cell wafer having a first crystal orientation and including a silicon single crystal wafer and a first notch, forming a peripheral circuit stack on a peripheral circuit wafer, the peripheral circuit wafer including a silicon single crystal wafer and having a second crystal orientation different from the first crystal orientation, and bonding the cell wafer to the peripheral circuit wafer such that the memory stack and the peripheral circuit stack come into contact with each other, wherein the first crystal orientation is expressed as {first surface orientation}<first notch direction>, and the first crystal orientation includes any one of {110}<100>, {110}<112>, {111}<110>, and {111}<112>.

A handle substrate for a composite structure comprises a base substrate including an epitaxial layer of silicon on a monocrystalline silicon wafer obtained by Czochralski pulling, a passivation layer on and in contact with the epitaxial layer of silicon, and a charge-trapping layer on and in contact with the passivation layer. The monocrystalline silicon wafer of the base substrate exhibits a resistivity of between 10 and 500 ohm.Math.cm, while the epitaxial layer of silicon exhibits a resistivity of greater than 2000 ohm.Math.cm and a thickness ranging from 2 to 100 microns. The passivation layer is amorphous or polycrystalline. A method is described for forming such a substrate.

A wafer processing method for a wafer formed of a semiconductor material includes: preparing a wafer that includes a front surface, a back surface on a rear surface of the front surface, and a side surface ranging from the front surface to the back surface and includes a flat mirror surface portion indicating a crystal orientation of the wafer on the side surface; and grinding the back surface of the wafer prepared in the preparing to form a recess and form a projection surrounding the recess.