There is provided a method for manufacturing a SiC device wafer comprising the steps: a) slicing and polishing a SiC boule to thicker substrates compared to the usual thickness in the prior art, b) creating a device wafer on the substrate, c) removing the device wafer from the remaining substrate, d) adding SiC to the remaining substrate so that the original thickness of the substrate is essentially restored, and repeating steps b)-d). The removal of the device wafer can be made for instance by laser slicing. Advantages include that the SiC material loss is significantly decreased and the boule material used for device wafers is considerably increased, the substrates become more stable especially during high temperature processes, the warp and bow is reduced, the risk of breakage is decreased.

Methods are provided for recycling a dummy wafer so that the dummy wafer may be repeatedly used in a deposition process. The dummy wafer includes a substrate and an oxide layer on the substrate that is formed by the deposition process. A thickness of the oxide layer on the dummy wafer may be measured, and the dummy wafer may be subjected to recycling depending on whether the measured thickness of the oxide layer exceeds a threshold thickness. The dummy wafer is recycled by removing the oxide layer, which may be accomplished by performing an etching process. A mechanical polishing process may be performed to smooth the surface of the substrate. The dummy wafer may then be reused in a subsequent deposition process.

Methods are provided for recycling a dummy wafer so that the dummy wafer may be repeatedly used in a deposition process. The dummy wafer includes a substrate and an oxide layer on the substrate that is formed by the deposition process. A thickness of the oxide layer on the dummy wafer may be measured, and the dummy wafer may be subjected to recycling depending on whether the measured thickness of the oxide layer exceeds a threshold thickness. The dummy wafer is recycled by removing the oxide layer, which may be accomplished by performing an etching process. A mechanical polishing process may be performed to smooth the surface of the substrate. The dummy wafer may then be reused in a subsequent deposition process.

A semiconductor wafer is singulated to form a plurality of semiconductor packages. The semiconductor wafer has a semiconductor substrate, a metal layer, an adhesive layer, a rigid supporting layer, a passivation layer and a plurality of contact pads. A semiconductor package has a semiconductor substrate, a metal layer, an adhesive layer, a rigid supporting layer, a passivation layer and a plurality of contact pads. A thickness of the rigid supporting layer is larger than a thickness of the semiconductor substrate. A thickness of the metal layer is thinner than the thickness of the semiconductor substrate. An entirety of the rigid supporting layer may be made of a single crystal silicon material or a poly-crystal silicon material. The single crystal silicon material or the poly-crystal silicon material may be fabricated from a reclaimed silicon wafer. An advantage of using a reclaimed silicon wafer is for a cost reduction.

There is provided a method for manufacturing a group-III nitride substrate, including: (a) preparing a substrate which is made of a group III-nitride crystal and which has a high oxygen concentration domain where an oxygen concentration is higher than that of a matrix of the crystal; (b) irradiating the substrate with laser beam aiming at the high oxygen concentration domain, forming a through-hole penetrating the substrate in a thickness direction, and removing at least a part of the high oxygen concentration domain from the substrate; and (c) embedding at least a part of an inside of the through-hole by growing the group-III nitride crystal in the through-hole.

A method for producing a composite silicon carbide structure comprises: providing an initial substrate of monocrystalline silicon carbide; depositing an intermediate layer of polycrystalline silicon carbide at a temperature higher than 1000? C. on the initial substrate, the intermediate layer having a thickness greater than or equal to 1.5 microns; implanting light ionic species through the intermediate layer to form a buried brittle plane in the initial substrate, delimiting the thin layer between the buried brittle plane and the intermediate layer, and depositing an additional layer of polycrystalline silicon carbide at a temperature higher than 1000? C. on the intermediate layer, the intermediate layer and the additional layer forming a carrier substrate, and separating the buried brittle plane during the deposition of the additional layer.

This invention application provides a method for manufacturing a SOI substrate, and the method comprising: providing a first semiconductor substrate; growing a first insulating layer on a top surface of the first semiconductor substrate for forming a first wafer; irradiating the first semiconductor substrate via a ion beam for forming a doping layer to a pre-determined depth from a top surface of the first insulating layer; providing a second substrate; growing a second insulating layer on a top surface of the second semiconductor substrate for forming a second wafer; bonding the first wafer with the second wafer; annealing the first wafer and second wafer at a deuterium atmosphere; separating a part of the first wafer from the second wafer; and forming a deuterium doped layer on the second wafer.

There is provided a method for manufacturing a SiC device wafer comprising the steps: a) slicing and polishing a SiC boule to thicker substrates compared to the usual thickness in the prior art, b) creating a device wafer on the substrate, c) removing the device wafer from the remaining substrate, d) adding SiC to the remaining substrate so that the original thickness of the substrate is essentially restored, and repeating steps b)-d). The removal of the device wafer can be made for instance by laser slicing. Advantages include that the SiC material loss is significantly decreased and the boule material used for device wafers is considerably increased, the substrates become more stable especially during high temperature processes, the warp and bow is reduced, the risk of breakage is decreased.

A method for manufacturing an SOI wafer having SOI layer includes a thinning step to adjust SOI film thickness of the SOI wafer, including the steps of: (A1) measuring the SOI film thickness of the SOI wafer having the SOI layer before the thinning step; (A2) determining rotational position of the SOI wafer in the thinning step on the basis of a radial SOI film thickness distribution obtained in the measuring of the film thickness and previously determined radial stock removal distribution in the thinning step, and rotating the SOI wafer around the central axis thereof so as to bring the SOI wafer to the determined rotational position; and (A3) thinning the SOI layer of the rotated SOI wafer. The method for manufacturing the SOI wafer can produce an SOI wafer with an excellent radial film thickness uniformity of the SOI layer after the thinning step.

A method for fabricating a cost-effective semiconductor on higher-thermal conductive multilayer (ML) composite wafer, the method comprising the steps of: taking a semiconductor host wafer having a first and a second host wafer surface and preparing the first host wafer surface; growing a transitional layer (TL) having properties of limiting diffusion on the host wafer first surface; depositing a uniform and low-defect additional layer (AL) on the TL; polishing the TL to prepare for bonding; taking a sacrificial semiconductor wafer, having a first and second sacrificial wafer surface, and bonding the first sacrificial wafer surface to the TL at room temperature; removing the sacrificial wafer from the TL and recycling the sacrificial wafer for future use; and grinding and polishing the first host wafer surface; whereby the resultant first host wafer surface becomes a starting surface of the ML composite wafer for device manufacturing.