A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.

A through-substrate vias structure includes a substrate having opposing first and second major surfaces. One or more conductive via structures are disposed extending from the first major surface to a first vertical distance within the substrate. A recessed region extends from the second major surface to a second vertical distance within the substrate and adjoining a lower surface of the conductive via. In one embodiment, the second vertical distance is greater than the first vertical distance. A conductive region is disposed within the recessed region and is configured to be in electrical and/or thermal communication with the conductive via.

A method for manufacturing a semiconductor device is provided. A semiconductor substrate is received. The semiconductor substrate is patterned to form a plurality of protrusions spaced from one another, wherein the protrusion comprises a base section, and a seed section stacked on the base section. A plurality of first insulative structures are formed, covering sidewalls of the base sections and exposing sidewalls of the seed sections. A plurality of spacers are formed, covering the sidewalls of the seed sections. The first insulative structures are partially removed to partially expose the sidewalls of the base sections. The base sections exposed from the first insulative structures are removed. A plurality of second insulative structures are formed under the seed sections.

A method of manufacturing a semiconductor device includes thinning a wafer at a back-surface side so that the wafer has an inner portion inside a peripheral portion, the peripheral portion surrounding the inner portion along an outer edge of the wafer, the inner portion having a thickness thinner than a thickness of the peripheral portion; attaching a first support member to the wafer at the back-surface side; cutting the wafer at a front surface side of the wafer along a boundary between the inner portion and the peripheral portion so that the inner portion is separated from the peripheral portion and a back-surface of the inner portion coheres on the first support member; and processing a front surface side of the inner portion while holding the inner portion and the peripheral portion on the first support member.

A semiconductor wafer according to an embodiment includes a support region facing a support member, an outer circumferential region positioned on an outer side of the support region, and an inner circumferential region positioned on an inner side of the support region. The outer circumferential region has a convex portion with a thickness protruded upward with respect to the inner circumferential region or a concave portion with a thickness recessed downward with respect to the inner circumferential region.

Methods and apparatus for reducing warpage of a substrate. In some embodiments, a method of reducing substrate warpage comprises heating the substrate with an epoxy layer to at least a glass transition temperature of the epoxy layer while allowing the substrate to expand; maintaining the at least the glass transition temperature of the substrate until the substrate is constrained; constraining the substrate with a total clamping force of approximately 5000N to approximately 7000N exerted towards the substrate from a top direction and a bottom direction; applying at least one electrostatic field to the substrate with a first electrostatic chuck positioned above the substrate and a second electrostatic chuck positioned below the substrate; and rapidly cooling the substrate using a first liquid convection heat sink positioned above the substrate and a second liquid convection heat sink positioned below the substrate.

Embodiments provide a method of analyzing a shape of a wafer, including: measuring a cross-sectional shape of a plurality of wafers; obtaining a first angle formed by a first line connecting a first point to a second point having a maximum curvature in an edge region of the wafer and a front surface of the wafer; forming a thin film layer on a surface of each of the wafers; measuring a thickness profile of an edge region of the wafer on which each of the thin film layers is formed; and confirming a wafer having a smallest maximum thickness profile of the thin film layer among the plurality of wafers.

A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer can be made of an insulating material or metal. A trench is formed in the surface of the base material. The covering layer extends into the trench to provide the cantilevered protrusion of the covering layer. A portion of the base material is removed by plasma etching to form a cantilevered protrusion extending beyond an edge of the base material. The cantilevered protrusion can be formed by removing the base material to the covering layer, or the cantilevered protrusion can be formed within the base material under the covering layer. A second semiconductor die is disposed partially under the cantilevered protrusion. An interconnect structure is formed between the cantilevered protrusion and second semiconductor die.

According to one aspect, a reconditioning wafer can include a carrier substrate that supports at least one array of regularly spaced protrusions configured to form indentations in a support surface of a wafer holding stage. The protrusions within the same array can have substantially the same shape and dimensions, thereby enabling a more reliable reconditioning process compared to prior art solutions. The protrusions may have the form of pyramids or pillars or other similar shapes with at least the tip of the protrusions formed of a material suitable to make the indentations. The reconditioning wafer can be obtainable by a molding technique wherein an array of molds can be created in a mold substrate. The molds can be filled with an indentation material such as diamond, and can be bonded to the carrier substrate. The mold substrate can be removed by thinning and wet etching.

A silicon carbide single crystal substrate includes a first main surface, a second main surface, and a circumferential edge portion. The second main surface is opposite to the first main surface. The circumferential edge portion connects the first main surface and the second main surface. The circumferential edge portion has a linear orientation flat portion, a first arc portion having a first radius, and a second arc portion connecting the orientation flat portion and the first arc portion and having a second radius smaller than the first radius, when viewed along a direction perpendicular to the first main surface.