A method for manufacturing a semiconductor device is provided. A semiconductor substrate is received. The semiconductor substrate is patterned to form a plurality of protrusions spaced from one another, wherein the protrusion comprises a base section, and a seed section stacked on the base section. A plurality of first insulative structures are formed, covering sidewalls of the base sections and exposing sidewalls of the seed sections. A plurality of spacers are formed, covering the sidewalls of the seed sections. The first insulative structures are partially removed to partially expose the sidewalls of the base sections. The base sections exposed from the first insulative structures are removed. A plurality of second insulative structures are formed under the seed sections.

A crystalline material processing method includes forming subsurface laser damage at a first average depth position to form cracks in the substrate interior propagating outward from at least one subsurface laser damage pattern, followed by imaging the substrate top surface, analyzing the image to identify a condition indicative of presence of uncracked regions within the substrate, and taking one or more actions responsive to the analyzing. One potential action includes changing an instruction set for producing subsequent laser damage formation (at second or subsequent average depth positions), without necessarily forming additional damage at the first depth position. Another potential action includes forming additional subsurface laser damage at the first depth position. The substrate surface is illuminated with a diffuse light source arranged perpendicular to a primary substrate flat and positioned to a first side of the substrate, and imaged with an imaging device positioned to an opposing second side of the substrate.

A laser processing apparatus includes an irradiation portion, and a controller. The irradiation portion includes a shaping portion configured to shape the laser light. The controller includes: a determination portion configured to determine a first and a second orientation; a processing controller configured to perform a first process of forming the modified region along a first region and stopping formation of the modified region other than the first region, and a second process of forming the modified region along a second region and stopping formation of the modified region other than the second region; and an adjustment portion configured to adjust the orientation of the longitudinal direction to be the first orientation when the first process is performed, and to adjust the orientation of the longitudinal direction to be the second orientation when the second process is performed.

Implementations of a packaging system may include a wafer; and a curvature adjustment structure coupled thereto where the curvature adjustment structure may be configured to alter a curvature of a largest planar surface of the wafer.

A semiconductor device has a first semiconductor die with a base material. A covering layer is formed over a surface of the base material. The covering layer can be made of an insulating material or metal. A trench is formed in the surface of the base material. The covering layer extends into the trench to provide the cantilevered protrusion of the covering layer. A portion of the base material is removed by plasma etching to form a cantilevered protrusion extending beyond an edge of the base material. The cantilevered protrusion can be formed by removing the base material to the covering layer, or the cantilevered protrusion can be formed within the base material under the covering layer. A second semiconductor die is disposed partially under the cantilevered protrusion. An interconnect structure is formed between the cantilevered protrusion and second semiconductor die.

The present disclosure provides a method for wafer bonding, including providing a wafer, forming a sacrificial layer on a top surface of the first wafer, trimming an edge of the first wafer to obtain a first wafer area, cleaning the top surface of the first wafer, removing the sacrificial layer, and bonding the top surface of the first wafer to a second wafer having a second wafer area greater than the first wafer area.

A through-substrate vias structure includes a substrate having opposing first and second major surfaces. One or more conductive via structures are disposed extending from the first major surface to a first vertical distance within the substrate. A recessed region extends from the second major surface to a second vertical distance within the substrate and adjoining a lower surface of the conductive via. In one embodiment, the second vertical distance is greater than the first vertical distance. A conductive region is disposed within the recessed region and is configured to be in electrical and/or thermal communication with the conductive via.

An out-of-plane deformable semiconductor substrate includes a plurality of rigid portions having a first thickness and an out-of-plane deformable portion having a second thickness and connecting the plurality of rigid portions to each other. The second thickness is smaller than the first thickness. The out-of-plane deformable semiconductor substrate is monolithic.

High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

According to one aspect, a reconditioning wafer can include a carrier substrate that supports at least one array of regularly spaced protrusions configured to form indentations in a support surface of a wafer holding stage. The protrusions within the same array can have substantially the same shape and dimensions, thereby enabling a more reliable reconditioning process compared to prior art solutions. The protrusions may have the form of pyramids or pillars or other similar shapes with at least the tip of the protrusions formed of a material suitable to make the indentations. The reconditioning wafer can be obtainable by a molding technique wherein an array of molds can be created in a mold substrate. The molds can be filled with an indentation material such as diamond, and can be bonded to the carrier substrate. The mold substrate can be removed by thinning and wet etching.