The subject embodiments relate to carbon nanotube (CNT) transistors with carrier blocking using thin dielectric under the drain or source and drain contacts. According to an embodiment, a transistor is provided that comprises a CNT channel layer, a metal source contact formed on the carbon nanotube channel layer, and a metal drain contact formed on the carbon nanotube channel layer. The transistor structure further comprises a drain dielectric layer formed adjacent to and between a lower surface of the metal drain contact and an upper surface of the carbon nanotube channel layer. In one or more implementations, the drain dielectric layer comprises a material that suppresses injection of a first type of carrier into the CNT channel layer and facilitates the injection of a second type of carrier into the CNT channel layer.

The subject embodiments relate to carbon nanotube (CNT) transistors with carrier blocking using thin dielectric under the drain or source and drain contacts. According to an embodiment, a transistor is provided that comprises a CNT channel layer, a metal source contact formed on the carbon nanotube channel layer, and a metal drain contact formed on the carbon nanotube channel layer. The transistor structure further comprises a drain dielectric layer formed adjacent to and between a lower surface of the metal drain contact and an upper surface of the carbon nanotube channel layer. In one or more implementations, the drain dielectric layer comprises a material that suppresses injection of a first type of carrier into the CNT channel layer and facilitates the injection of a second type of carrier into the CNT channel layer.

An apparatus comprising: pyroelectric material; an electric field sensor; a first conductive electrode comprising a first area adjacent the pyroelectric material; a second conductive electrode comprising a second area adjacent the electric field sensor; and a conductive interconnection between the first conductive electrode and the second conductive electrode, wherein the first area of the first conductive electrode is larger than the second area of the second conductive electrode.

A method for providing a carbonaceous membrane is disclosed. The method includes forming a sacrificial layer on a first substrate. The method includes forming a carbonaceous membrane on the sacrificial layer. The method includes removing the sacrificial layer, with a first surface of the carbonaceous membrane still facing the first substrate. The method includes completely removing the first substrate from the carbonaceous membrane. The method includes coupling the carbonaceous membrane to a second substrate.

The present application discloses a semiconductor device and a method for forming a p-type conductive channel in a diamond using an abrupt heterojunction, which pertain to the technical field of fabrication of semiconductor devices. The method includes: forming a diamond layer on a substrate; forming one or multiple layers of a heterogeneous elementary substance or compound having an acceptor characteristic on an upper surface of the diamond layer; forming a heterojunction at an interface between the diamond layer and an acceptor layer; forming two-dimensional hole gas at one side of the diamond layer with a distance of 10 nm-20 nm away from the heterojunction; and using the two-dimensional hole gas as a p-type conductive channel. The method enables a concentration and a mobility of carriers to maintain stable at a temperature range of 0 C.-1000 C., thereby realizing normal operation of the diamond device at high temperature environment.

A homoepitaxial, ultrathin tunnel barrier-based electronic device in which the tunnel barrier and transport channel are made of the same materialgraphene.

A method of forming a p-n junction device comprises providing a base layer including a p-type diamond. A monolayer or few layer of a transition metal dichalcogenide (TMDC) is disposed on at least a portion of the base layer so as to form a heterojunction therebetween. The TMDC monolayer is an n-type layer such that the heterojunction between the intrinsic and p-type diamond base layer and the n-type TMDC monolayer is a p-n junction.

An integrated circuit (IC) includes a first, second and third semiconductor cell regions. The first cell region includes a first active region having a first dopant type. The second semiconductor cell region abuts the first cell region in a second direction, and includes second and third active regions having correspondingly a second dopant type and the first dopant type. The second active region is between the first and third active regions. The third cell region abuts the second cell region in the second direction, and includes a fourth active region having the second dopant type. The third active region is between the fourth active region and the second active region. The second semiconductor cell region has a height 2H, and the first, second and third semiconductor cell regions collectively have a height 3H.

A thin film transistor and a producing method thereof, and an array substrate, which belong to a technical field of the thin film transistor, can solve a problem of poor performance of a conventional thin film transistor. The producing method of the thin film transistor comprises: S1: forming a gate electrode (11) composed of graphene; S2: forming a gate insulating layer (12) composed of oxidized graphene; S3: forming an active region (13) composed of doped oxidized graphene or doped graphene; S4: forming a source electrode (14) and a drain electrode (15) composed of graphene, wherein, the graphene composing the source electrode (14), the drain electrode (15) and the gate electrode (11) is formed by reducing oxidized graphene, and the doped oxidized graphene or doped graphene composing the active region (13) is formed by treating oxidized graphene.

A homoepitaxial, ultrathin tunnel barrier-based electronic device in which the tunnel barrier and transport channel are made of the same materialgraphene.