Transistors and methods for fabricating the transistors are disclosed. In some implementations, a transistor includes: a substrate; a gate electrode disposed over the substrate; a gate insulating layer disposed between the gate electrode and the substrate; one or more doped regions formed in the substrate; and one or more selector layers disposed over the substrate, at least one of the one or more selector layers vertically overlapping at least one of the one or more doped regions, wherein each of the one or more selector layers includes an insulating material layer and a dopant, wherein the insulating material layer includes a same material as the gate insulating layer, and the dopant is doped in the insulating material layer.

The laser doping apparatus may irradiate a predetermined region of a semiconductor material with a pulse laser beam to perform doping. The laser doping apparatus may include: a solution supplying system configured to supply dopant-containing solution to the predetermined region, and a laser system including at least one laser device configured to output the pulse laser beam to be transmitted by the dopant-containing solution, and a time-domain pulse waveform changing apparatus configured to control a time-domain pulse waveform of the pulse laser beam.

A doping system includes a light source to emit an optical pulse; a light source controller connected to the light source, to control an energy density of the optical pulse; and a beam adjusting unit to irradiate the optical pulse to a surface of a doping-object made of silicon carbide on which an impurity-containing source-film containing impurity atoms is deposited. The light source controller irradiates a first optical pulse to the impurity-containing source-film so as to form a reaction-product layer in the doping-object, and irradiates a second optical pulse having an energy density higher than an energy density of the first optical pulse, so as to introduce the impurity atoms into the target through the reaction-product layer.

In a general aspect, an apparatus can include a semiconductor substrate, a drift region disposed in the semiconductor substrate; a body region disposed in the drift region and a source region disposed in the body region. The apparatus can also include a gate trench disposed in the semiconductor substrate. The apparatus can further include a gate dielectric disposed on a sidewall and a bottom surface of the gate trench, the gate dielectric on the sidewall defining a first interface with the body region and the gate dielectric on the bottom surface defining a second interface with the body region. The apparatus can still further include a gate electrode disposed on the gate dielectric and a lateral channel region disposed in the body region, the lateral channel region being defined along the second interface.

A method of forming a semiconductor device is provided such that a trench is formed in a semiconductor body at a first surface of the semiconductor body. Dopants are introduced into a first region at a bottom side of the trench by ion implantation. A filling material is formed in the trench. Dopants are introduced into a second region at a top side of the filling material. Thermal processing of the semiconductor body is carried out and is configured to intermix dopants from the first and the second regions by a diffusion process along a vertical direction perpendicular to the first surface.

A method of forming a semiconductor device and a semiconductor device are provided. The method includes forming a graphene layer at a first side of a silicon carbide substrate having at least next to the first side a first defect density of at most 5*10.sup.2/cm.sup.2; attaching an acceptor layer at the graphene layer to form a wafer-stack, the acceptor layer comprising silicon carbide having a second defect density higher than the first defect density; forming an epitaxial silicon carbide layer; splitting the wafer-stack along a split plane in the silicon carbide substrate to form a device wafer comprising the graphene layer and a silicon carbide split layer at the graphene layer; and further processing the device wafer at the upper side.

A method of forming a semiconductor device and a semiconductor device are provided. The method includes forming a graphene layer at a first side of a silicon carbide substrate having at least next to the first side a first defect density of at most 500/cm.sup.2. An acceptor layer is attached at the graphene layer to form a wafer-stack. The acceptor layer includes silicon carbide having a second defect density higher than first defect density. The wafer-stack is split along a split plane in the silicon carbide substrate to form a device wafer including the graphene layer and a silicon carbide split layer at the graphene layer. An epitaxial silicon carbide layer extending to an upper side of the device wafer is formed on the silicon carbide split layer. The device wafer is further processed at the upper side.

Provided is a method of manufacturing a semiconductor device having a photodiode that has a shallow p-n junction and thus achieves high sensitivity to an ultraviolet ray, in which an oxide containing impurities at high concentration is deposited on the surface of the silicon substrate, and thereafter a diffusion region is formed to have a shallow junction by performing thermal diffusion of a rapid temperature change, with the use of a high-speed temperature rising and falling apparatus without using ion implantation into the silicon substrate.

A semiconductor device of an embodiment includes an SiC layer having a first and a second plane, an n-type first SiC region in the SiC layer, p-type second SiC regions between the first SiC region and the first plane, n-type third SiC regions between the second SiC regions and the first plane, a gate electrode provided between two p-type second SiC regions, a gate insulating film provided between the gate electrode and the second SiC regions, a metal layer provided between two p-type second SiC regions, and having a work function of 6.5 eV or more, and a first electrode electrically connected to the metal layer, and a second electrode, the SiC layer provided between the first electrode and the second electrode, and a part of the first SiC region is disposed between the gate insulating film and the metal layer.

A method for manufacturing a silicon carbide semiconductor device includes the steps of preparing a silicon carbide substrate having a first main surface and a second main surface located on a side opposite to the first main surface, forming an epitaxial layer on the first main surface, the epitaxial layer having a first conductivity type and having a third main surface located on a side opposite to a side on which the silicon carbide substrate is located, forming a trench, which includes side walls intersecting with the third main surface and a bottom portion connected to the side walls, in the epitaxial layer, widening an opening of the trench, and forming an embedded region, which has a second conductivity type different from the first conductivity type, in the trench. The epitaxial layer adjacent to the embedded region and the embedded region constitute a superjunction structure.