A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate of a first conductivity type, a first silicon carbide layer of the first conductivity type, and an insulating film. In the silicon carbide semiconductor device, no fluorine or chlorine is detectable in the insulating film, at a boundary layer of the insulating film and the first silicon carbide layer, or at the surface of first silicon carbide layer where the insulating film is provided.

A semiconductor device includes a semiconductor substrate having a main surface and a back surface, a drift region having a first conductivity type, a body region formed in the drift region and having a second conductivity type, a plurality of grooves passing through the body region from the main surface toward the back surface, a gate electrode formed in the plurality of grooves with a gate insulating film interposed therebetween, and an electric field relaxation layer provided below the plurality of grooves in the drift region and having a second conductivity type. The electric field relaxation layer continuously extends over the entire body region.

A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate including a foundation layer having a first conductivity type; forming a deep trench in the foundation layer; and forming a deep layer having a second conductivity type by introducing material gas of the compound semiconductor while introducing dopant gas into an epitaxial growth equipment to cause epitaxial growth of the deep layer in the deep trench. A period in which a temperature in the epitaxial growth equipment is increased to a temperature of the epitaxial growth of the deep layer is defined as a temperature increasing period. In the forming the deep layer, the deep layer is further formed in a bottom corner portion of the deep trench by starting the introducing of the dopant gas during the temperature increasing period and starting the introducing of the material gas after the temperature increasing period.

A semiconductor device may include: an n type of layer disposed on a first surface of a substrate; a p+ type of region disposed on the first surface of the substrate; a p type of region disposed at a top portion of the n type of layer; a first electrode disposed on the p+ type of region and the p type of region; and a second electrode disposed on a second surface of the substrate, wherein the side surface of the p+ type of region and the side surface of the n type of layer are in contact, and the thickness of the p+ type of region is the same as the thickness of the n type of layer and the thickness of the p type of region.

A method for manufacturing a compound semiconductor device includes: providing a semiconductor substrate that includes a foundation layer; forming a deep trench in the foundation layer; and filling the deep trench with a deep layer having a second conductive type and a limiting layer having the first conductive type. In the filling the deep trench, growth of the deep layer from a bottom of the deep trench toward an opening inlet of the deep trench and growth of the limiting layer from a side face of the deep trench are achieved by: dominant epitaxial growth of a second conductive type layer over a first conductive type layer on the bottom of the deep trench; and dominant epitaxial growth of the first conductive type layer over the second conductive type layer on the side face of the deep trench, based on plane orientation dependency of the compound semiconductor during epitaxial growth.

A method of manufacturing a silicon carbide semiconductor device includes forming a first silicon carbide layer of a first conductivity type on a front surface of a silicon carbide semiconductor substrate. A thermal oxidation film is formed on a surface of a base body including the first silicon carbide layer. The thermal oxidation film is subsequently removed using a solution containing hydrofluoric acid. The base body is washed with a mixture of ammonia water and a hydrogen peroxide solution, a mixture of hydrochloric acid and a hydrogen peroxide solution, and a dilute hydrofluoric acid. The base body is held at temperature of 700 degrees C. to 1700 degrees C., and an insulating film is deposited on the base body.

A selectivity can be improved in a desirable manner when etching a processing target object containing silicon carbide. An etching method of processing the processing target object, having a first region containing silicon carbide and a second region containing silicon nitride and in contact with the first region, includes etching the first region to remove the first region atomic layer by atomic layer by repeating a sequence comprising: generating plasma from a first gas containing nitrogen to form a mixed layer containing ions contained in the plasma generated from the first gas in an atomic layer of an exposed surface of the first region; and generating plasma from a second gas containing fluorine to remove the mixed layer by radicals contained in the plasma generated from the second gas.

An insulated-gate semiconductor device, which has trenches arranged in a chip structure, the trenches defining both sidewalls in a first and second sidewall surface facing each other, includes: a first unit cell including a main-electrode region in contact with a first sidewall surface of a first trench, a base region in contact with a bottom surface of the main-electrode region and the first sidewall surface, a drift layer in contact with a bottom surface of the base region and the first sidewall surface, and a gate protection-region in contact with the second sidewall surface and a bottom surface of the first trench; and a second unit cell including an operation suppression region in contact with a first sidewall surface and a second sidewall surface of a second trench, wherein the second unit cell includes the second trench located at one end of an array of the trenches.

A gate connection layer (14) includes a portion placed on an outer trench (TO) with a gate insulating film (7) being interposed. A first main electrode (10) includes a main contact (CS) electrically connected to a well region (4) and a first impurity region (5) within an active region (30), and an outer contact (CO) being spaced away from the active region (30) and in contact with a bottom face of the outer trench (TO). A trench-bottom field relaxing region (13) is provided in a drift layer (3). A trench-bottom high-concentration region (18) has an impurity concentration higher than that of the trench-bottom field relaxing region (13), is provided on the trench-bottom field relaxing region (13), and extends from a position where it faces the gate connection layer (14) with the gate insulating film (7) being interposed, to a position where it is in contact with the outer contact (CO) of the first main electrode (10).

The technique disclosed in the Description relates to a technique preventing dielectric breakdown while a silicon carbide semiconductor device is OFF, without degrading process throughput or yield. The silicon carbide semiconductor device relating to the technique disclosed in the Description includes a drift layer of a first conductivity type, a threading dislocation provided to penetrate the drift layer, and an electric-field reduction region of a second conductivity type disposed in a position in the surface layer of the drift layer, the position corresponding to the threading dislocation. The electric-field reduction region is an epitaxial layer.