A semiconductor substrate manufacturing method includes the steps of: forming, on a first surface of a first substrate, a plurality of terrace portions arranged in a first direction parallel to a horizontal plane of the first substrate, and a step portion having a predetermined height between two adjacent terrace portions in the first direction; forming a first semiconductor layer such that a part of the step portion is exposed; and vaporizing a portion of Si of the first substrate from a part of the step portion exposed from the first semiconductor layer by performing heat treatment on the first substrate on which the first semiconductor layer is formed, thereby forming a buffer layer having at least one graphene layer in at least a part between the first semiconductor layer and the first substrate.

A method of positioning elements or additional technological levels on the incident surface of an infrared detector of hybridized type, said detector being formed of a detection circuit comprising an array network of photosensitive sites for the wavelength ranges of interest, hybridized on a read circuit, said detection circuit resulting from the epitaxial growth of a detection material on a substrate, comprising forming within the detection circuit indexing patterns by marking of the growth substrate.

A method of positioning elements or additional technological levels on the incident surface of an infrared detector of hybridized type, said detector being formed of a detection circuit comprising an array network of photosensitive sites for the wavelength ranges of interest, hybridized on a read circuit, said detection circuit resulting from the epitaxial growth of a detection material on a substrate, comprising forming within the detection circuit indexing patterns by marking of the growth substrate.

Embodiments of the present disclosure generally relate to a susceptor for thermal processing of semiconductor substrates. In one embodiment, the susceptor includes an inner region having a pattern formed in a top surface thereof, the pattern including a plurality of substrate support features separated by a plurality of venting channels. The susceptor includes a rim surrounding and coupled to the inner region, wherein the inner region is recessed relative to the rim to form a recessed pocket configured to receive a substrate. The susceptor includes a plurality of bumps extending radially inward from an inner diameter of the rim, the plurality of bumps configured to contact an outer edge of a substrate supported by the plurality of substrate support features for positioning the substrate within the recessed pocket.