H01L21/182

Fabrication of nanowire vertical gate devices

A method of forming a nanowire heterostructure, including, forming a dummy nanowire on a substrate, forming a sacrificial cover layer on the dummy nanowire, forming a spacer layer on a portion of the sacrificial cover layer, wherein a portion of the sacrificial cover layer extends above the top surface of the spacer layer, removing the portion of the sacrificial cover layer that extends above the top surface of the spacer layer, forming a gate structure on the spacer layer and a remaining portion of the sacrificial cover layer, forming an interlayer dielectric (ILD) layer on the gate structure, removing the dummy nanowire to form a nanowire trench, and forming a replacement nanowire in the nanowire trench.

FABRICATION OF NANOWIRE VERTICAL GATE DEVICES
20190123138 · 2019-04-25 ·

A method of forming a nanowire heterostructure, including, forming a dummy nanowire on a substrate, forming a sacrificial cover layer on the dummy nanowire, forming a spacer layer on a portion of the sacrificial cover layer, wherein a portion of the sacrificial cover layer extends above the top surface of the spacer layer, removing the portion of the sacrificial cover layer that extends above the top surface of the spacer layer, forming a gate structure on the spacer layer and a remaining portion of the sacrificial cover layer, forming an interlayer dielectric (ILD) layer on the gate structure, removing the dummy nanowire to form a nanowire trench, and forming a replacement nanowire in the nanowire trench

INTERFACIAL CONTROL OF OXYGEN VACANCY DOPING AND ELECTRICAL CONDUCTION IN THIN FILM OXIDE HETEROSTRUCTURES

Systems and methods of reversibly controlling the oxygen vacancy concentration and distribution in oxide heterostructures consisting of electronically conducting In.sub.2O.sub.3 films grown on ionically conducting Y.sub.2O.sub.3-stabilized ZrO.sub.2 substrates. Oxygen ion redistribution across the heterointerface is induced using an applied electric field oriented in the plane of the interface, resulting in controlled oxygen vacancy (and hence electron) doping of the film and possible orders-of-magnitude enhancement of the film's electrical conduction. The reversible modified behavior is dependent on interface properties and is attained without cation doping or changes in the gas environment in contact with the sample.

High electron mobility transistor with indium nitride layer

A semiconductor device includes an indium gallium nitride layer over an active layer. The semiconductor device further includes an annealed region beneath the indium gallium nitride layer, the annealed region comprising indium atoms driven from the indium gallium nitride layer into the active layer.

Fabrication of nanowire vertical gate devices

A method of forming a nanowire heterostructure, including, forming a dummy nanowire on a substrate, forming a sacrificial cover layer on the dummy nanowire, forming a spacer layer on a portion of the sacrificial cover layer, wherein a portion of the sacrificial cover layer extends above the top surface of the spacer layer, removing the portion of the sacrificial cover layer that extends above the top surface of the spacer layer, forming a gate structure on the spacer layer and a remaining portion of the sacrificial cover layer, forming an interlayer dielectric (ILD) layer on the gate structure, removing the dummy nanowire to form a nanowire trench, and forming a replacement nanowire in the nanowire trench.

Light emitting device, light emitting device package, light unit, and method of manufacturing same
10038119 · 2018-07-31 · ·

The embodiment relates to a light emitting device, a method of fabricating the same, a light emitting device package, and a lighting system. According to the embodiment, a light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer, a second conductive semiconductor layer, a first electrode electrically connected with the first conductive semiconductor layer, a second electrode electrically connected with the second conductive semiconductor layer, an insulating member provided on the light emitting structure while exposing the first electrode and the second electrode, a third electrode provided on the first electrode, and a fourth electrode provided on the second electrode. The third electrode includes a first part of the third electrode directly making contact with the first electrode and a second part of the third electrode, which is provided on the first part of the third electrode and has a horizontal width wider than the first part of the third electrode, and the fourth electrode includes a first part of the fourth electrode directly making contact with the second electrode and a second part of the fourth electrode, which is provided on the first part of the fourth electrode and has a horizontal width wider than the first part of the fourth electrode. The light extraction efficiency and the heat radiation characteristic may be improved, and the reliability may be improved.

Diffusion agent composition, method of forming impurity diffusion layer, and solar cell

A diffusion agent composition used in forming an impurity diffusion agent layer on a semiconductor substrate, and containing an impurity diffusion component, a silicon compound, and a solvent containing a solvent having a boiling point of 100 C. or less, a solvent having a boiling point of 120-180 C., and a solvent having a boiling point of 300 C.

Wafer structure for electronic integrated circuit manufacturing

A bonded wafer structure having a handle wafer, a device wafer, and an interface region with an abrupt transition between the conductivity profile of the device wafer and the handle wafer is used for making semiconductor devices. The improved doping profile of the bonded wafer structure is well suited for use in the manufacture of integrated circuits. The bonded wafer structure is especially suited for making radiation-hardened integrated circuits.

Method of laser treatment of a semiconductor wafer comprising AlGaInP-LEDs to increase their light generating efficiency

Embodiments provide a method for treating a semiconductor wafer comprising a set of aluminum gallium indium phosphide light emitting diodes (AlGaInP-LEDs) to increase a light generating efficiency of the AlGaInP-LEDs, wherein each AlGaInP-LED includes a core active layer for light generation sandwiched between two outer layers, the core active layer having a central light generating area and a peripheral edge surrounding the central light generating area, wherein the method includes treating the peripheral edge of the core active layer of each AlGaInP-LED with a laser beam thereby increasing a minimum band gap in each peripheral edge to such an extent that, during operation of the AlGaInP-LED, an electron-hole recombination is essentially confined to the central light generating area.