Patent classifications
H01L21/185
METHOD FOR PRODUCING GAN LAYERED SUBSTRATE
Provided is a method for producing a GaN layered substrate, comprising the steps of: subjecting a C-plane sapphire substrate 11 having an off-angle of 0.5° to 5° to a high-temperature nitriding treatment at 800° C. to 1,000° C. to carry out a surface treatment of the C-plane sapphire substrate; carrying out epitaxial growth of GaN on the surface of the surface-treated C-plane sapphire substrate 11 to produce a GaN film carrier having a surface of an N polar face; forming an ion implantation region 13.sub.ion by carrying out ion implantation on the GaN film 13; laminating and joining a support substrate 12 with the GaN film-side surface of the ion-implanted GaN film carrier; and separating at the ion-implanted region 13.sub.ion in the GaN film 13 to transfer a GaN thin film 13a onto the support substrate 12, to produce a GaN layered substrate 10 having, on the support substrate 12, a GaN thin film 13a having a surface of a Ga polar face. A GaN layered substrate having a good crystallinity and a surface of a Ga face is obtained by a single transfer process.
METHOD OF MANUFACTURING AN ELECTRONIC DEVICE
There is provided a method for manufacturing an electronic device including a substrate of semiconductor material, an intermediate portion, and a silicon carbide layer, the method including transferring the silicon carbide layer from a first electronic element onto a face of a second electronic element including the substrate, the transfer including: providing the first element including a primary silicon carbide-based layer, a first diffusion barrier portion, and a first metal layer; providing the second element including the substrate, a second diffusion barrier portion, and a second metal layer; and bonding an exposed face of each of the first and the second metal layers, the first and the second metal layers being formed of tungsten, the first and the second portions being formed of at least one tungsten silicide layer, and the second portion, the second metal layer, the first metal layer, and the first portion form the intermediate portion.
Semiconductor substrate structure and power semiconductor device
A semiconductor substrate structure includes: a substrate; and an epitaxial growth layer bonded to the substrate, wherein the substrate and the epitaxial growth layer are bonded by a room-temperature bonding or a diffusion bonding.
A DIAMOND ASSEMBLY
A bonded diamond assembly and a method of forming the assembly. The assembly comprises a polycrystalline diamond wafer having a largest linear dimension of between 25 mm and 200 mm, a substrate and a bonding layer located between the diamond and the substrate and bonding them together. The bonding layer, when inspected using ultrasound using a resolution of 50 m, a focal length selected to inspect the bonding layer, and frequencies of 100 MHz and 30 MHz, comprises low numbers of voids extending either across the thickness of the bonding layer and low numbers of voids that do not extend across the thickness of the bonding layer.
METHOD FOR PRODUCING A SUBSTRATE FOR THE EPITAXIAL GROWTH OF A LAYER OF A GALLIUM-BASED III-N ALLOY
A method of fabricating a substrate for epitaxial growth of a layer of gallium nitride (GaN), aluminum gallium nitride (AlGaN) or indium gallium nitride (InGaN), comprises the following successive steps: providing a base substrate comprising at least one layer of single-crystal silicon carbide, performing epitaxial growth of a layer of semi-insulating SiC having a thickness larger than 1 m on the layer of single-crystal SiC to form a donor substrate, implanting ionic species into the layer of semi-insulating SiC so as to form a weakened region defining a thin layer of single-crystal semi-insulating SiC to be transferred, bonding the layer of semi-insulating SiC directly to a receiver substrate having a high electrical resistivity, and detaching the donor substrate along the weakened region so as to transfer the thin layer of single-crystal semi-insulating SiC to the receiver substrate.
PSEUDO-SUBSTRATE WITH IMPROVED EFFICIENCY OF USAGE OF SINGLE CRYSTAL MATERIAL
The invention relates to a method for fabricating a pseudo-substrate comprising the steps of providing a single crystal ingot, providing a handle substrate, cutting a thin slice from the single crystal ingot, and attaching the thin slice to the handle substrate to form a pseudo-substrate. According to the invention, the thickness of the thin slice is substantially equal or inferior to a critical thickness below which the slice, if taken alone, is no longer mechanically stable. The invention further relates to a semiconductor structure.
SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME
According to one embodiment, the array chip includes a three-dimensionally disposed plurality of memory cells and a memory-side interconnection layer connected to the memory cells. The circuit chip includes a substrate, a control circuit provided on the substrate, and a circuit-side interconnection layer provided on the control circuit and connected to the control circuit. The circuit chip is stuck to the array chip with the circuit-side interconnection layer facing to the memory-side interconnection layer. The bonding metal is provided between the memory-side interconnection layer and the circuit-side interconnection layer. The bonding metal is bonded to the memory-side interconnection layer and the circuit-side interconnection layer.
Method for preparing a heterostructure
The present disclosure provides a method for preparing heterostructure, which includes providing a donor substrate and forming a sacrificial layer on a surface of the donor substrate; forming a thin film cover layer on a surface of the sacrificial layer, wherein a top surface of the thin film cover layer is an implantation surface; performing ion implantation from the implantation surface, such that a defect layer is formed in the sacrificial layer; providing an acceptor substrate, and bonding the acceptor substrate to the implantation surface of the thin film cover layer; removing the sacrificial layer along the defect layer. The method for preparing the heterostructure of the present disclosure can successfully transfer the thin film cover layer to the acceptor substrate. The present disclosure can provide a compliant substrate, while the semiconductor donor substrate material can be reused, therefore is energy-efficient and environmental-friendly.
Polycrystalline SiC substrate and method for manufacturing same
A support substrate 2 is a polycrystalline SiC substrate formed of polycrystalline SiC. Assuming that one of the two sides of the polycrystalline SiC substrate is a first side and that the other side is a second side, a substrate grain size change rate of the polycrystalline SiC substrate, which is a value obtained by dividing a difference between the average value of crystal grain sizes of the polycrystalline SiC on the first side and the average value of crystal grain sizes of the polycrystalline SiC on the second side by a thickness of the polycrystalline SiC substrate, is 0.43% or less. A radius of curvature of the polycrystalline SiC substrate is 142 m or more.
Method of forming and transferring thin film using SOI wafer and heat treatment process
The present invention relates to a method of forming and transferring a thin film. The method of forming and transferring a thin film according to one embodiment may include a step of bonding a carrier wafer coated with a polymer bonding material to the top of a silicon-on-insulator (SOI) wafer formed by sequentially laminating a backside silicon layer, a buried oxide layer, and a silicon layer; a step of etching the backside silicon layer using the buried oxide layer as an etching barrier, and then selectively etching the buried oxide layer; a step of separating the carrier wafer from the polymer bonding material, and bonding a target wafer including an oxide layer to the bottom of the silicon layer through direct bonding; and a step of transferring the silicon layer to the top of the target wafer including the oxide layer by removing the polymer bonding material.