A memory device and a manufacturing method therefor. A film-stack structure is formed on a substrate, the film-stack structure includes sacrificial layers and active layers alternately stacked in a first direction. Part of the film-stack structure located in a first area is removed. A plurality of first grooves spaced apart from each other and extend in a second direction are formed, where the substrate is exposed from the first grooves to divide the active layers located in the first area into a plurality of active pillars spaced apart from each other. The sacrificial layers located in the first and second areas are removed. Part of the active layers located in the second area is removed, to form a plurality of step-shaped connection layers on an end of the second area away from the first area. Gate material layers are formed to cover the connection layers and the active pillars.

Methods of forming SOI substrates are disclosed. In some embodiments, an epitaxial layer and an oxide layer are formed on a sacrificial substrate. An etch stop layer is formed in the epitaxial layer. The sacrificial substrate is bonded to a handle substrate at the oxide layer. The sacrificial substrate is removed. The epitaxial layer is partially removed until the etch stop layer is exposed.

A laser processing apparatus includes: a laser light source that generates a laser beam; a first beam splitter on which the laser beam is incident; a second beam splitter on which the laser beam having passed through the first beam splitter is incident; and a homogenizer that controls an energy density of the laser beam emitted from the second beam splitter. The laser beam output from the homogenizer includes a p-polarized component and an s-polarized component, and a ratio of energy intensity of the p-polarized component to the s-polarized component is preferably not lower than 0.74 and not higher than 1.23 on a surface of the workpiece.

A laser processing apparatus includes: a laser light source that generates a laser beam; a first beam splitter on which the laser beam is incident; a second beam splitter on which the laser beam having passed through the first beam splitter is incident; and a homogenizer that controls an energy density of the laser beam emitted from the second beam splitter. The laser beam output from the homogenizer includes a p-polarized component and an s-polarized component, and a ratio of energy intensity of the p-polarized component to the s-polarized component is preferably not lower than 0.74 and not higher than 1.23 on a surface of the workpiece.

A semiconductor substrate is provided in the present disclosure. The semiconductor substrate includes a first semiconductor layer and a second semiconductor layer on the first semiconductor layer. The first semiconductor layer has a first lattice constant (L1) and the second semiconductor layer has a second lattice constant (L2). A ratio of a difference (L2-L1) between the second lattice constant (L2) and the first lattice constant (L1) to the first lattice constant (L1) is greater than 0.036.

A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.

A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.

A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes: providing a to-be-etched layer including a first region; forming a first pattern material layer on the to-be-etched layer; forming a sacrificial layer on the first pattern material layer; forming a first opening in the sacrificial layer over the first region, where the first opening exposes a first portion of the first pattern material layer; forming a first doped region in the first pattern material layer using the sacrificial layer as a mask; forming a second opening in the sacrificial layer over the first region, where the second opening exposes a second portion of the first pattern material layer; and forming a second doped region in the first pattern material layer using the sacrificial layer as a mask, where the second doped region is connected with the first doped region.

A semiconductor structure and a method for forming the semiconductor structure are provided. The method includes: providing a to-be-etched layer including a first region; forming a first pattern material layer on the to-be-etched layer; forming a sacrificial layer on the first pattern material layer; forming a first opening in the sacrificial layer over the first region, where the first opening exposes a first portion of the first pattern material layer; forming a first doped region in the first pattern material layer using the sacrificial layer as a mask; forming a second opening in the sacrificial layer over the first region, where the second opening exposes a second portion of the first pattern material layer; and forming a second doped region in the first pattern material layer using the sacrificial layer as a mask, where the second doped region is connected with the first doped region.

A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.