A semiconductor manufacturing method by a semiconductor manufacturing device includes: positioning an anode, which causes an oxidation reaction, in a first end of a base material containing an aluminum oxide and a cathode, which causes a reduction reaction, in a second end of the base material; heating the base material to melt it with the anode being in contact with the first end of the base material and the cathode being in contact with the second end of the base material; causing a current to flow between the anode and the cathode to cause a molten salt electrolysis reaction for a whole of or a part of a period in which the base material is at least partially melted; and after the molten salt electrolysis reaction, cooling the base material to form a p-type aluminum oxide semiconductor layer and an n-type aluminum oxide semiconductor layer.

A semiconductor manufacturing method by a semiconductor manufacturing device includes: positioning an anode, which causes an oxidation reaction, in a first end of a base material containing an aluminum oxide and a cathode, which causes a reduction reaction, in a second end of the base material; heating the base material to melt it with the anode being in contact with the first end of the base material and the cathode being in contact with the second end of the base material; causing a current to flow between the anode and the cathode to cause a molten salt electrolysis reaction for a whole of or a part of a period in which the base material is at least partially melted; and after the molten salt electrolysis reaction, cooling the base material to form a p-type aluminum oxide semiconductor layer and an n-type aluminum oxide semiconductor layer.

A method of forming a semiconductor structure includes providing a substrate; forming a low-k dielectric layer over the substrate; embedding a conductive wiring into the low-k dielectric layer; and thermal soaking the conductive wiring in a carbon-containing silane-based chemical to form a barrier layer on the conductive wiring. A lining barrier layer is formed in the opening for embedding the conductive wiring. The lining barrier layer may comprise same materials as the barrier layer, and the lining barrier layer may be recessed before forming the barrier layer and may contain a metal that can be silicided.

A method of producing a surface-mountable multi-chip component includes providing a chip arrangement including a metallic conductor structure exposed at a rear side, a plurality of semiconductor chips and an housing material; and forming a solder stop coating on a rear side of the chip arrangement, wherein the solder stop coating separates connection regions of the conductor structure.

Methods of forming SOI substrates are disclosed. In some embodiments, an epitaxial layer and an oxide layer are formed on a sacrificial substrate. An etch stop layer is formed in the epitaxial layer. The sacrificial substrate is bonded to a handle substrate at the oxide layer. The sacrificial substrate is removed. The epitaxial layer is partially removed until the etch stop layer is exposed.

A substrate support for a plasma chamber includes a base plate arranged along a plane, a first layer of an electrically insulating material arranged on the base plate along the plane, a plurality of heating elements arranged in the first layer along the plane, and a plurality of diodes arranged in respective cavities in the first layer. The plurality of diodes are connected in series to the plurality of heating elements, respectively. Each of the plurality of diodes includes a die of a semiconductor material arranged in a respective one of the cavities. The semiconductor material has a first coefficient of thermal expansion. A first side of the die is arranged on the first layer along the plane. A first terminal of the die is connected to a first electrical contact on the first layer.

In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.

In a manufacturing process of a transistor including an oxide semiconductor film, oxygen doping treatment is performed on the oxide semiconductor film, and then heat treatment is performed on the oxide semiconductor film and an aluminum oxide film provided over the oxide semiconductor film. Consequently, an oxide semiconductor film which includes a region containing more oxygen than a stoichiometric composition is formed. The transistor formed using the oxide semiconductor film can have high reliability because the amount of change in the threshold voltage of the transistor by a bias-temperature stress test (BT test) is reduced.

A semiconductor device includes a plurality of base layers. A tunneling layer is disposed on the plurality of base layers. A contact layer is disposed on the tunneling layer. An alloyed metal contact is annealed on to the contact layer. The alloyed metal contact forms a first region and a second region in the contact layer. The first region of the contact layer diffuses into the tunneling layer. The second region of the contact layer resides over the tunneling layer. The tunneling layer facilitates electron mobility of the second region.

A semiconductor device includes a plurality of base layers. A tunneling layer is disposed on the plurality of base layers. A contact layer is disposed on the tunneling layer. An alloyed metal contact is annealed on to the contact layer. The alloyed metal contact forms a first region and a second region in the contact layer. The first region of the contact layer diffuses into the tunneling layer. The second region of the contact layer resides over the tunneling layer. The tunneling layer facilitates electron mobility of the second region.