In a MEMS device, an oxide layer is disposed between first and second semiconductor layers and MEMS resonator is formed within a cavity in the first semiconductor layer. A first electrically conductive feature functionally coupled to the MEMS resonator is exposed at a surface of the first semiconductor layer, and an insulating region is exposed at the surface of the first semiconductor layer adjacent the first electrically conductive feature. A semiconductor cover layer is bonded to the surface of the first semiconductor layer to hermetically seal the MEMS resonator within the cavity. A second electrically conductive feature extends through the semiconductor cover layer to contact the first electrically conductive feature, and an isolation trench extends through the semiconductor cover layer to the insulating region to electrically isolate a conductive path formed by the first and second electrically conductive features.

A semiconductor device manufacturing method is disclosed. The semiconductor device manufacturing method includes: a preparation step of preparing a semiconductor wafer; a removal step of removing a thickness part of the semiconductor wafer; and a cutting step of cutting the semiconductor wafer. In the removal step, a rib-shaped portion partially raised on a second main surface of the semiconductor wafer is used as an alignment mark, so that a cutter can align with the semiconductor wafer.

In a method in which a workpiece, while being temporarily fixed on a support via a temporary fixing material, is processed and/or transported and thereafter the support and the workpiece are separated from each other by an irradiation separation method, a technique is shown which prevents the photo-degradation of the workpiece. A workpiece treating method includes a step of forming a stack including a support, a temporary fixing material and a workpiece wherein the temporary fixing material includes a layer (I) that contains a polymer (A) including a structural unit (A1); a step of processing the workpiece and/or transporting the stack; a step of applying light to the layer (I) through the support; and a step of separating the support and the workpiece from each other. ##STR00001##

The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.

A semiconductor substrate includes a carrier and leads formed on the carrier, and a space exists between the adjacent leads and reveals a surface of the carrier. A processing method of the semiconductor substrate uses a laser beam passing through the space to etch the carrier such that there are ditches recessed on the carrier. The ditches can increase fluidity of coating fluid, such as underfill, ACF and solder resist. Furthermore, during etching the carrier, the laser beam also can remove residues remained between the leads to improve yield of the semiconductor substrate.

In a vertical MOSFET of a trench gate structure, a high-concentration implantation region is provided in a p-type base region formed from a p-type silicon carbide layer formed by epitaxial growth, so as to include a portion in which a channel is formed. The high-concentration implantation region is formed by ion implantation of a p-type impurity into the p-type silicon carbide layer. The high-concentration implantation region is formed by p-type ion implantation and has an impurity concentration profile in which concentration differences in a depth direction form a bell-shaped curve at a peak of impurity concentration that is higher than that of the p-type silicon carbide layer. In the p-type base region, disorder occurs partially in the crystal structure consequent to the ion implantation for forming the high-concentration implantation region.

A method for mirror-coating lateral surfaces of optical components, a mirror-coated optical component and an optoelectronic semiconductor body mountable on surface are disclosed. In an embodiment, an optoelectronic semiconductor body includes a semiconductor chip having a radiation side and a contact side different from the radiation side, wherein contact elements for electrically contacting the semiconductor body are attached to the contact side, and wherein the contact elements are freely accessible. The body further includes a metal mirror layer disposed on the semiconductor chip, wherein the metal mirror layer has a reflectivity of at least 80% to radiation emitted by the semiconductor chip during operation, wherein the mirror layer is a continuous and contiguous mirror layer, which covers all sides of the semiconductor chip that are not the contact side and the radiation side by at least 95%, and wherein the mirror layer is arranged at the semiconductor chip in a form-fit manner.

A method for bonding a contact surface of a first substrate to a contact surface of a second substrate comprising of the steps of: positioning the first substrate on a first receiving surface of a first receiving apparatus and positioning the second substrate on a second receiving surface of a second receiving apparatus; establishing contact of the contact surfaces at a bond initiation site; and bonding the first substrate to the second substrate along a bonding wave which is travelling from the bond initiation site to the side edges of the substrates, wherein the first substrate and/or the second substrate is/are deformed for alignment of the contact surfaces.

The invention concerns an assembly method comprising the following steps: a) providing a first substrate comprising a first face made from crystalline indium phosphide, b) providing a second substrate comprising a second crystalline face different from the indium phosphide, c) forming an intermediate layer of crystalline indium phosphide on the second face of the second substrate, d) forming an assembly, via a direct bonding step, by bringing the first face of the first substrate into contact with the intermediate layer, the direct bonding step being carried out in an atmosphere having a pressure greater than 104 Pa, and preferably higher than 103 Pa, e) subjecting the assembly formed in step d) to heat treatment.

A method for temporarily protecting a semiconductor device wafer during processing includes preparing a solution including poly(vinyl alcohol) and water, coating the device wafer with the prepared solution, baking the coated device wafer to form a protective layer, processing the baked device wafer, and dissolving the protective layer from the processed wafer with a solvent at a temperature not less than 65 C. The solvent includes water. The baking is at a temperature from 150 C. to 170 C. The protective layer remains on the baked device wafer during processing. The poly(vinyl alcohol) has a degree of hydrolysis greater than or equal to 93%.