It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Semiconductor devices including at least one diode over a conductive strap. The semiconductor device may include at least one conductive strap over an insulator material, at least one diode comprising a single crystalline silicon material over a conductive material, and a memory cell on the at least one diode. The at least one diode may be formed from a single crystalline silicon material. Methods of forming such semiconductor devices are also disclosed.

A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

A method for wafer to wafer bonding for III-V and CMOS wafers is provided. A silicon carrier wafer is provided having an epitaxial III-V semiconductor region and an oxide region disposed over the wafer top surface, the regions having substantially equal heights. A sidewall of the epitaxial III-V semiconductor region directly contacts a sidewall of the oxide region. A eutectic bonding layer is formed over a top surface of the epitaxial III-V semiconductor region and the oxide region for bonding to the CMOS wafer which contains semiconductor devices. The silicon carrier wafer is removed, and the CMOS wafer is singulated to form a plurality of three-dimensional integrated circuits, each including a CMOS substrate corresponding to a portion of the CMOS wafer and a III-V optical device corresponding to a portion of the III-V epitaxial semiconductor region.

The present invention is notably directed to methods of fabrication of a microfluidic chip package or assembly (1), comprising: providing (S1) a substrate (10, 30) having at least one block (14, 14a) comprising one or more microfluidic structures on a face (F) of the substrate; partially cutting (S2) into the substrate to obtain partial cuts (10c), such that a residual thickness of the substrate at the level of the partial cuts (10c) enables singulation of said at least one block (14, 14a); cleaning (S4) said at least one block; and applying (S5-S7) a cover-film (62) to cover said at least one block (14, 14a), whereby at least one covered block is obtained, the applied cover film still enabling singulation of each covered block, wherein each covered block corresponds to a microfluidic chip after singulation. The present invention is further directed to microfluidic chips, packing or assembly, obtainable with such methods.

The present invention provides structures and methods that enable the construction of micro-LED chiplets formed on a sapphire substrate that can be micro-transfer printed. Such printed structures enable low-cost, high-performance arrays of electrically connected micro-LEDs useful, for example, in display systems. Furthermore, in an embodiment, the electrical contacts for printed LEDs are electrically interconnected in a single set of process steps. In certain embodiments, formation of the printable micro devices begins while the semiconductor structure remains on a substrate. After partially forming the printable micro devices, a handle substrate is attached to the system opposite the substrate such that the system is secured to the handle substrate. The substrate may then be removed and formation of the semiconductor structures is completed. Upon completion, the printable micro devices may be micro transfer printed to a destination substrate.

A flexible display panel, a package method thereof and a display device are provided. The package method includes: bonding a barrier film provided with an adhesive layer on a surface of a side of a display motherboard away from a substrate of the display motherboard, the non-adhesive portion of the adhesive layer loses adhesivity and covers the bonding area; the adhesive portion at least covers the display area; cutting the display motherboard provided with the barrier film, so that the adhesive portion for covering the display area is separate from adjacent portions, and a portion to be retained and a portion to be removed in the barrier film are separate; and stripping off portions, except the adhesive portion for covering the display area, in the adhesive layer and the portion to be removed in the barrier film.

An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.