Patent classifications
H01L21/46
Method for manufacturing bonded wafer
A method for manufacturing a bonded wafer, includes: ion-implanting a gas ion such as a hydrogen ion from a surface of a bond wafer, thereby forming an ion-implanted layer; bonding the bond wafer and a base wafer; producing a bonded wafer having a thin-film on the base wafer by delaminating the bond wafer along the ion-implanted layer; and performing an RTA treatment on the bonded wafer in a hydrogen gas-containing atmosphere; wherein a protective film is formed onto the surface of the thin-film in a heat treatment furnace in the course of temperature-falling from the maximum temperature of the RTA treatment before the bonded wafer is taken out from the heat treatment furnace; and then the bonded wafer with the protective film being formed thereon is taken out from the heat treatment furnace, and is then cleaned with a cleaning liquid which can etch the protective film and the thin-film.
Method for fabricating semiconductor structures including fin structures with different strain states, and related semiconductor structures
Methods of forming a semiconductor structure include providing a multi-layer substrate having an epitaxial base layer overlying a strained primary semiconductor layer above a buried oxide layer. Elements within the epitaxial base layer are used to alter a strain state in the primary semiconductor layer within a first region of the multi-layer substrate without altering a strain state in the primary semiconductor layer within a second region of the multi-layer substrate. A first plurality of transistor channel structures are formed that each comprise a portion of the primary semiconductor layer within the first region of the multi-layer substrate, and a second plurality of transistor channel structures are formed that each comprise a portion of the primary semiconductor layer within the second region of the multi-layer substrate. Semiconductor structures fabricated by such methods may include transistor channel structures having differing strain states.
Roll to roll wafer backside particle and contamination removal
Particulate cleaning assemblies and methods for cleaning are disclosed. In one example, a device for removing particles from a backside surface of a substrate is described. The device includes a chamber body with a substrate chucking device, a particulate cleaning article positioned over the substrate supporting surface, an optical sensing device positioned under the particulate cleaning article and a substrate positioning device separates the particulate cleaning article and a substrate. In another example, a method for removing particles from a substrate is disclosed. The method includes positioning a substrate with a processing surface and a supporting surface in a process chamber. At least a portion of the substrate can be chucked to a substrate chucking device, the substrate chucking device having a substrate supporting surface with a particulate cleaning article positioned thereon. The substrate is then separated from the particulate cleaning article leaving particles behind.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.
Semiconductor wafer device and manufacturing method thereof
A method of manufacturing a semiconductor device comprises providing a carrier, disposing a plurality of dies over the carrier along a first direction and a second direction orthogonal to the first direction to arrange the plurality of dies in a plurality of rows, and shifting one of the plurality of rows along the first direction or the second direction in a predetermined distance.
Semiconductor device
An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.
Semiconductor device
An object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.
3D memory device and structure
A semiconductor device, the device including: a first level overlaid by a first memory level, where the first memory level includes a first thinned single crystal substrate; a second memory level, the second memory level disposed on top of the first memory level, where the second memory level includes a second thinned single crystal substrate; and a memory control level disposed on top of the second memory level, where the memory control level is bonded to the second memory level, and where the bonded includes oxide to oxide and conductor to conductor bonding.
Manufacturing method for semiconductor substrate
A technique disclosed herein relates to a manufacturing method for a semiconductor substrate having the bonded interface with high bonding strength without forming an oxide layer at the bonded interface also for the substrate having surface that is hardly planarized. The manufacturing method for the semiconductor substrate may include an amorphous layer formation process in which a first amorphous layer is formed by modifying a surface of a support substrate and a second amorphous layer is formed by modifying a surface of a single-crystalline layer of a semiconductor. The manufacturing method may include a contact process in which the first amorphous layer and the second amorphous layer are contacted with each other. The manufacturing method may include a heat treatment process in which the support substrate and single-crystalline layer are heat-treated with the first amorphous layer and the second amorphous layer being in contact with each other.