Patent classifications
H01L21/4803
Ultra-low profile package shielding technique using magnetic and conductive layers for integrated switching voltage regulator
Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer, a conductive layer formed in the foundation layer, and a magnetic layer formed between the conductive and the foundation layer. The conductive layer and the magnetic layer are coupled to form a low-profile inductor shield. The semiconductor package also has a dielectric layer formed between the magnetic and foundation layer. The foundation layer is mounted between a motherboard and a semiconductor die, where the foundation layer is attached to the motherboard with solder balls. Accordingly, the low-profile inductor shield may include a z-height that is less than a z-height of the solder balls. The low-profile inductor shield may have solder pads that are coupled to the conductive layer. The foundation layer may include at least one of voltage regulator and inductor, where the inductor is located above the low-profile inductor shield.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
A technique disclosed in this description relates to a semiconductor device and a method of manufacturing the semiconductor device, and is intended to provide a semiconductor device having high heat dissipation performance. The semiconductor device relating to the technique disclosed in this description includes a diamond substrate and a nitride semiconductor layer. The diamond substrate is made of diamond. The nitride semiconductor layer is formed in a recess formed at an upper surface of the diamond substrate.
HIGH RESISTIVITY WAFER WITH HEAT DISSIPATION STRUCTURE AND METHOD OF MAKING THE SAME
A high resistivity wafer with a heat dissipation structure includes a high resistivity wafer and a metal structure. The high resistivity wafer includes a heat dissipation region and a device support region. The high resistivity wafer consists of an insulating material. The metal structure is only embedded within the heat dissipation region of the high resistivity wafer. The metal structure surrounds the device support region.
HIGH RESISTIVITY WAFER WITH HEAT DISSIPATION STRUCTURE AND METHOD OF MAKING THE SAME
A high resistivity wafer with a heat dissipation structure includes a high resistivity wafer and a metal structure. The high resistivity wafer includes a heat dissipation region and a device support region. The high resistivity wafer consists of an insulating material. The metal structure is only embedded within the heat dissipation region of the high resistivity wafer. The metal structure surrounds the device support region.
Methods to design and uniformly co-fabricate small vias and large cavities through a substrate
A method of forming concurrently openings in a substrate or wafer or a portion of substrate or wafer openings therein at least one of the openings has a relatively high aspect ratio and another one of the openings has a relatively low aspect ratio, the method comprising: bonding the substrate or wafer or a portion of substrate or wafer to a carrier substrate; forming a ring trench in the substrate or wafer or in a portion of the substrate or wafer, the ring trench having an outer perimeter that corresponds an outer perimeter of the another one of the openings having said relatively low aspect ratio and having an inner perimeter spaced from the outer perimeter by a predetermined distance; forming an opening in said substrate or wafer or in a portion of substrate or wafer having said high aspect ratio concurrently with the forming of the ring trench; and separating the substrate or wafer or in a portion of the substrate or wafer from the carrier substrate.
Heat dissipation substrate and fabricating method thereof
A heat dissipation substrate includes an insulating layer, a metal heat dissipation block, and a patterned structure layer. The insulating layer has a first surface, a second surface and at least one through hole. The metal heat dissipation block passes through the insulating layer from the second surface of the insulating layer and has an upper surface, a lower surface, and a contact surface. There is a first vertical height between the contact surface and the lower surface. The patterned structure layer includes a patterned circuit layer and at least one conductive structure layer. The patterned circuit layer is disposed on the first surface of the insulating layer, and the conductive structure layer is connected to the patterned circuit layer and extends to cover an inner wall of the through hole. The patterned circuit layer has a top surface, the conductive structure layer has a bottom surface. There is a second vertical height between the top surface and the first surface, and the first vertical height is 3 times to 300 times the second vertical height.
Radio-frequency device comprising semiconductor device and waveguide component
A radio-frequency device comprises a semiconductor device, comprising a radio-frequency chip, and a first connection element, which is configured to mechanically and electrically connect the semiconductor device to a circuit board. The radio-frequency device furthermore comprises a waveguide component arranged over the semiconductor device, comprising a waveguide embodied in the waveguide component, and a second connection element, which mechanically connects the waveguide component to the semiconductor device. At least one from the first connection element or the second connection element is embodied in an elastic fashion.
Method of mechanical separation for a double layer transfer
The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.
Integrated circuit packages with wettable flanks and methods of manufacturing the same
Leadframes, integrated circuit packaging with wettable flanks, and methods of manufacturing the same are disclosed. An example packaged device having a leadframe includes a die pad and a lead spaced apart from the die pad. The lead has a proximal end adjacent the die pad and a distal end extending away from the die pad. The lead has a thickness at the distal end that is less than a full thickness of the leadframe between a first outer surface on a die attach side of the leadframe and a second outer surface on a mounting side of the leadframe.
Thermal transfer structures for semiconductor die assemblies
Several embodiments of the present technology are described with reference to a semiconductor apparatus. In some embodiments of the present technology, a semiconductor apparatus includes a stack of semiconductor dies attached to a thermal transfer structure. The thermal transfer structure conducts heat away from the stack of semiconductor dies. Additionally, the assembly can include molded walls to support the thermal transfer structure.