An electronic device includes a substrate, at least one electronic element on the substrate, a heat dissipating pad on the substrate in thermal contact with the at least one electronic element, and including an encapsulated phase change material therein, and a bracket covering the substrate, the at least one electronic element and the heat dissipating pad.

An electronic device includes a substrate, at least one electronic element on the substrate, a heat dissipating pad on the substrate in thermal contact with the at least one electronic element, and including an encapsulated phase change material therein, and a bracket covering the substrate, the at least one electronic element and the heat dissipating pad.

An electronic device includes at least one chip and an insulating body embedding the chip. The electronic device further includes a heat-sink in contact with the chip. The heat-sink includes a plate having a first thickness. A recess is provided in the plate that defines a central portion of the plate having a second thickness less than the first thickness. The chip is mounted to the central region of the heat-sink within the recess. The insulating body includes a surface, such as a mounting surface, including an opening exposing at least a portion of the heat-sink. The device may further include a reophore extending through a side surface of the insulating body, that reophore being in contact with the heat sink.

An electronic device includes at least one chip and an insulating body embedding the chip. The electronic device further includes a heat-sink in contact with the chip. The heat-sink includes a plate having a first thickness. A recess is provided in the plate that defines a central portion of the plate having a second thickness less than the first thickness. The chip is mounted to the central region of the heat-sink within the recess. The insulating body includes a surface, such as a mounting surface, including an opening exposing at least a portion of the heat-sink. The device may further include a reophore extending through a side surface of the insulating body, that reophore being in contact with the heat sink.

A semiconductor device having a composite pad including a primary portion and a subsidiary portion is disclosed. The primary portion is provided for electrical connection to an internal circuit of the semiconductor device. The subsidiary portion is provided for probing, in particular, for testing high frequency performance of the semiconductor device by probing with a RF-probe. Because the subsidiary portion is independent from the primary portion, the subsidiary portion does not affect the electrical performance of the semiconductor device. Also, the subsidiary portion has a narrowed contact area with respect to the RF-probe to lessen adherence of metal flakes from the pad onto the probe.

A semiconductor device having a composite pad including a primary portion and a subsidiary portion is disclosed. The primary portion is provided for electrical connection to an internal circuit of the semiconductor device. The subsidiary portion is provided for probing, in particular, for testing high frequency performance of the semiconductor device by probing with a RF-probe. Because the subsidiary portion is independent from the primary portion, the subsidiary portion does not affect the electrical performance of the semiconductor device. Also, the subsidiary portion has a narrowed contact area with respect to the RF-probe to lessen adherence of metal flakes from the pad onto the probe.

A semiconductor package includes an interconnect component surrounded by a molding compound. The interconnect component comprises a first RDL structure. A second RDL structure is disposed on the interconnect component. A plurality of first connecting elements is disposed on the second RDL structure. A polish stop layer covers a surface of the interconnect component. A plurality of second connecting elements is disposed on and in the polish stop layer. At least one semiconductor die is mounted on the second connecting elements.

A semiconductor package includes an interconnect component surrounded by a molding compound. The interconnect component comprises a first RDL structure. A second RDL structure is disposed on the interconnect component. A plurality of first connecting elements is disposed on the second RDL structure. A polish stop layer covers a surface of the interconnect component. A plurality of second connecting elements is disposed on and in the polish stop layer. At least one semiconductor die is mounted on the second connecting elements.

A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.

A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.