This application provides a packaging device and a manufacturing method therefor, and an electronic device, and relates to the field of electronic technologies. The packaging device includes: a circuit board having a first surface; a first plastic packaging layer covering the first surface, where the first plastic packaging layer includes a first channel, the first channel penetrates the first plastic packaging layer in a direction perpendicular to the first surface; and a first pin electrically connected to the circuit board, the first pin is located in one first channel, at least a part of the first pin is connected to an inner wall of the first channel, a first conductive surface that is of the first pin and that is away from the circuit board is exposed from the first channel, and the first pin is electrically connected to an external device by using the first conductive surface.

This application provides a packaging device and a manufacturing method therefor, and an electronic device, and relates to the field of electronic technologies. The packaging device includes: a circuit board having a first surface; a first plastic packaging layer covering the first surface, where the first plastic packaging layer includes a first channel, the first channel penetrates the first plastic packaging layer in a direction perpendicular to the first surface; and a first pin electrically connected to the circuit board, the first pin is located in one first channel, at least a part of the first pin is connected to an inner wall of the first channel, a first conductive surface that is of the first pin and that is away from the circuit board is exposed from the first channel, and the first pin is electrically connected to an external device by using the first conductive surface.

A nucleation suppression layer including a self-assembly material can be formed on a surface of a bonding dielectric layer without depositing the self-assembly material on physically exposed surfaces of first metal bonding pads of a first semiconductor die. Metallic liners including a second metal can be formed on the physically exposed surfaces of the metal bonding pads without depositing the second metal on the nucleation suppression layer. The first semiconductor die is bonded to a second semiconductor die by inducing metal-to-metal bonding between mating pairs of the first metal bonding pads and second metal bonding pads of the second semiconductor die.

A joint structure, in which an electronic component and a wiring substrate are joined to each other, includes: a base material of the electronic component; a base material of the wiring substrate; and a joint portion that includes at least an electrode of the electronic component and an electrode of the wiring substrate, and that joins the base material of the electronic component and the base material of the wiring substrate. The joint portion includes a material having an absorption coefficient of 2×10{circumflex over ( )}5 cm.sup.−1 or more for light of a wavelength of 250 to 1000 nm. The base material of at least one component of the electronic component and the wiring substrate consists of a material having an absorption coefficient of 1.5×10{circumflex over ( )}5 cm.sup.−1 or less for the light of a wavelength of 250 to 1000 nm.

A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate including a first surface and a second surface opposite to the first surface; a first electronic component mounted on the first surface of the substrate; a conductive pillar formed on the first surface of the substrate, wherein a height of the conductive pillar is smaller than a height of the first electronic component; and a first encapsulant disposed on the first surface of the substrate and covering the first electronic component and the conductive pillar; forming a groove in the first encapsulant to expose a top surface and a portion of a lateral surface of the conductive pillar; and forming a bump in the groove, wherein the bump covers the top surface and the exposed portion of the lateral surface of the conductive pillar.

A semiconductor device and a method for making the same are provided. The method includes: providing a package including: a substrate including a first surface and a second surface opposite to the first surface; a first electronic component mounted on the first surface of the substrate; a conductive pillar formed on the first surface of the substrate, wherein a height of the conductive pillar is smaller than a height of the first electronic component; and a first encapsulant disposed on the first surface of the substrate and covering the first electronic component and the conductive pillar; forming a groove in the first encapsulant to expose a top surface and a portion of a lateral surface of the conductive pillar; and forming a bump in the groove, wherein the bump covers the top surface and the exposed portion of the lateral surface of the conductive pillar.

The method for manufacturing a number of electrical nodes, wherein the method includes providing a number of electronic circuits onto a first substrate, such as on a printed circuit board or other electronics substrate, optionally, a low-temperature co-fired ceramic substrate, wherein each one of the electronic circuits includes a circuit pattern and at least one electronics component in connection with the circuit pattern, wherein the electronic circuits are spaced from each other on the first substrate, thereby defining a blank area surrounding each one of the number of electronic circuits, respectively, and providing potting or casting material to embed each one of the number of electronic circuits in the potting or casting material, and, subsequently, hardening, optionally including curing, the potting or casting material to form a filler material layer of the number of electrical nodes.

A diversified assembly printed circuit board includes a first printed circuit board provided with a multiple first conductive metals protruding from a surface of the first printed circuit board, and a multiple second printed circuit boards each provided with a multiple second conductive metals protruding from a surface of the each of the second printed circuit boards. At a connection position, solidified conductive metal paste is arranged between each of the first conductive metals and a corresponding second conductive metal to electrically connect each of the first conductive metals and the corresponding second conductive metal. A laminated adhesive sheet is arranged between each of the second printed circuit boards and the first printed circuit board to physically connect the second printed circuit boards and the first printed circuit board.

A semiconductor module includes: a supporting substrate; a conductive substrate bonded to the supporting substrate; a switching semiconductor element electrically bonded to the conductive substrate; and a conducting member that forms a path of a main circuit current switched by the semiconductor element. The conducting member is arranged to overlap with the obverse surface of the conductive substrate as viewed in a thickness direction of the supporting substrate. The conducting member is formed with an opening that overlaps with the obverse surface of the conductive substrate and does not overlap with the semiconductor element as viewed in the thickness direction.

An ultrasound vibrating-type defect detection apparatus (100) for detecting a defect in a semiconductor apparatus (10) is provided with: an ultrasound vibrator (42); a high-frequency power supply (40); a camera (45); and a controller (50) for adjusting the frequency of high-frequency power supplied from the high-frequency power supply (40) to the ultrasound vibrator (42), and for performing detection of a defect in the semiconductor apparatus (10). The controller (50) causes the camera (45) to capture an image of the semiconductor apparatus (10) while varying the frequency of high-frequency power supplied from the high-frequency power supply (40) to the ultrasound vibrator (42), and performs detection of a defect in the semiconductor apparatus (10) on the basis of the captured image.