Patent classifications
H01L21/67092
Apparatus and method for semiconductor wafer leveling, force balancing and contact sensing
A wafer bonder apparatus, includes a lower chuck, an upper chuck, a process chamber and three adjustment mechanisms. The three adjustment mechanisms are arranged around a top lid spaced apart from each other and are located outside of the process chamber. Each adjustment mechanism includes a component for sensing contact to the upper chuck, a component for adjusting the pre-load force of the upper chuck, and a component for leveling the upper chuck.
SUBSTRATE PROCESSING SYSTEM AND SUBSTRATE PROCESSING METHOD
A substrate processing system includes: a modification layer forming device configured to form a modification layer within a first substrate along a boundary between a peripheral portion to be removed and a central portion of the first substrate; an interface processing device configured to process an interface where the first substrate and a second substrate are bonded in the peripheral portion; a periphery removing device configured to remove the peripheral portion starting from the modification layer; a position detection device configured to detect a position of the modification layer or a position of the interface; and a control device configured to control the modification layer forming device and the interface processing device. The control device controls the position of the interface based on the detected position of the modification layer, or controls the position of the modification layer based on the detected position of the interface.
Wafer processing method and apparatus
An apparatus for and a method of bonding a first substrate and a second substrate are provided. In an embodiment a first wafer chuck has a first curved surface and a second wafer chuck has a second curved surface. A first wafer is placed on the first wafer chuck and a second wafer is placed on a second wafer chuck, such that both the first wafer and the second wafer are pre-warped prior to bonding. Once the first wafer and the second wafer have been pre-warped, the first wafer and the second wafer are bonded together.
STEALTH DICING LASER DEVICE
A stealth dicing laser device including: a pulse laser generator configured to generate laser light; a condenser lens formed in an optical path of the laser light; a pupil filter configured to transform a phase of the laser light before the laser light passes through the condenser lens; and a controller configured to provide a phase control signal to the pupil filter, wherein the pupil filter transforms the phase of the laser light based on the phase control signal, wherein the phase control signal is a signal transforming a phase expression of the laser light based on a parameter.
SUBSTRATE-BONDING DEVICE
A substrate-bonding device includes a carrier, three first aligning units, three second aligning units, a pressing plate, and two flat-edge aligners. A carrying surface of the carrier is provided with a placement area for placing a first substrate provided with a flat edge thereon. The first aligning units, the second aligning units and the flat edge aligners are disposed around the placement area. The first aligning units are configured to align the first substrate and to support a second substrate provided with a second flat edge. The second aligning units are configured to align the second substrate. The flat edge aligners are configured to contact the first and the second flat edges, to position and align the first and the second substrates. The pressing plate is disposed to face the placement area for pressing the first and second substrates. The flat edge aligners move along with the pressing plate.
METHOD AND DEVICE FOR PREFIXING OF SUBSTRATES
A method and a device for prefixing substrates, whereby at least one substrate surface of the substrates is amorphized in at least one surface area, characterized in that the substrates are aligned and then make contact and are prefixed on the amorphized surface areas.
Retaining ring for CMP
A retaining ring includes a generally annular body having an inner surface to constrain a substrate, an outer surface, and a bottom surface. The bottom surface has a plurality of channels extending from the outer surface to the inner surface and a plurality of islands separated by the channels and providing a contact area to contact a polishing pad. Each channel includes a recessed region adjacent the outer surface such that the channel is deeper in the recessed region than in a remainder of the channel. The recessed region and the remainder of the channel each have substantially uniform depth.
DIAMOND-LIKE CARBON COATED SEMICONDUCTOR EQUIPMENT
Embodiments of the present disclosure describe semiconductor equipment devices having a metal workpiece and a diamond-like carbon (DLC) coating disposed on a surface of the metal workpiece, thermal semiconductor test pedestals having a metal plate and a DLC coating disposed on a surface of the metal plate, techniques for fabricating thermal semiconductor test pedestals with DLC coatings, and associated configurations. A thermal semiconductor test pedestal may include a metal plate and a DLC coating disposed on a surface of the metal plate. The metal plate may include a metal block formed of a first metal and a metal coating layer formed of a second metal between the metal block and the DLC coating. An adhesion strength promoter layer may be disposed between the metal coating layer and the DLC coating. Other embodiments may be described and/or claimed.
Structures for aligning a semiconductor wafer for singulation
Implementations of a method for aligning a semiconductor wafer for singulation may include: providing a semiconductor wafer having a first side and a second side. The first side of the wafer may include a plurality of die and the plurality of die may be separated by streets. The semiconductor wafer may include an edge ring around a perimeter of the wafer on the second side of the wafer. The wafer may also include a metal layer on the second side of the wafer. The metal layer may substantially cover the edge ring. The method may include grinding the edge ring to create an edge exclusion area and aligning the semiconductor wafer with a saw using a camera positioned in the edge exclusion area on the second side of the wafer. Aligning the wafer may include using three or more alignment features included in the edge exclusion area.
Hyperbaric saw for sawing packaged devices
In a described example, an apparatus includes: a process chamber configured for a pressure greater than one atmosphere, having a device chuck configured to support electronic devices that are mounted on package substrates and partially covered in mold compound, the electronic devices spaced from one another by saw streets; and a saw in the process chamber configured to cut through the mold compound and package substrates in the saw streets to separate the molded electronic devices one from another.