Patent classifications
H01L21/67092
SUBSTRATE BONDING APPARATUS
According to one embodiment, in a substrate bonding apparatus a first chucking stage includes a first stage base, a plurality of first cylindrical members, and a plurality of first drive mechanisms. The first stage base includes a first main face facing a second chucking stage. The plurality of first cylindrical members are disposed on the first main face. The plurality of first cylindrical members are arrayed in planar directions. The plurality of first cylindrical members protrudes from the first main face in a direction toward the second chucking stage to chuck the first substrate. The plurality of first drive mechanisms are configured to drive the plurality of first cylindrical members independently of each other. The substrate bonding apparatus further comprises a first pressure control mechanism configured to control pressure states of spaces in the plurality of first cylindrical members independently of each other.
SiC substrate processing method
An SiC substrate processing method includes a separation layer forming step of setting a focal point of a laser beam having a transmission wavelength to SiC inside an SiC substrate and next applying the laser beam to the SiC substrate to thereby form a separation layer inside the SiC substrate, the SiC substrate having a first surface and a second surface opposite to the first surface; a first plate attaching step of attaching a first plate to the first surface of the SiC substrate; a second plate attaching step of attaching a second plate to the second surface of the SiC substrate; and a separating step of applying an external force to the separation layer after performing the first plate attaching step and the second plate attaching step, thereby separating the SiC substrate into a first SiC substrate and a second SiC substrate along the separation layer.
SUBSTRATE BONDING APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE BY USING THE SUBSTRATE BONDING APPARATUS
A substrate bonding apparatus includes a first bonding chuck configured to support a first substrate and a second bonding chuck configured to support a second substrate such that the second substrate faces the first substrate. The first bonding chuck includes a first base, a first deformable plate on the first base and configured to support the first substrate and configured to be deformed such that a distance between the first base and the first deformable plate is varied, and a first piezoelectric sheet on the first deformable plate and configured to be deformed in response to power applied thereto to deform the first deformable plate.
ALIGNMENT APPARATUS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
An alignment apparatus according to one embodiment, includes: a first and a second stage; a first and a second detector; a first and a second moving mechanism; and a controller. The first and second stages are configured to respectively hold a first and a second semiconductor substrate on which a first and a second alignment mark are respectively disposed. The first and second moving mechanisms are configured to respectively move the first and second stages relatively to each other. The controller is configured to perform the following (a), (b). (a) The controller control the detectors and the moving mechanisms to cause the first detector to detect the second alignment mark and to cause the second detector to detect the first alignment mark. (b) The controller calculate a position deviation between the substrates in accordance with results of the detections.
WORKPIECE CUTTING METHOD
A workpiece cutting method of cutting a workpiece along a plurality of crossing division lines formed on a front side of the workpiece, by using a cutting blade having a thickness gradually decreasing toward an outer circumference of the cutting blade. The workpiece cutting method includes a shape checking step of checking a shape of the cutting blade; a cut depth setting step of setting a cut depth by the cutting blade into the workpiece according to the shape checked in the shape checking step such that a width of a cut groove to be formed on the front side of the workpiece becomes a previously set value; and a cutting step of cutting the workpiece with the cut depth set in the cut depth setting step, by forcing the cutting blade into the workpiece from the front side thereof.
SUBSTRATE BONDING APPARATUS, MANUFACTURING SYSTEM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
According to one embodiment, there is provided a substrate bonding apparatus including a first chucking stage, a second chucking stage, and an alignment unit. The first chucking stage is configured to chuck a first substrate. The second chucking stage is disposed facing the first chucking stage. The second chucking stage is configured to chuck a second substrate. The alignment unit is configured to be inserted between the first chucking stage and the second chucking stage. The alignment unit includes a base body, a first detection element, and a second detection element. The base body includes a first main face and a second main face opposite to the first main face. The first detection element is disposed on the first main face. The second detection element is disposed on the second main face.
Method of aligning wafers, method of bonding wafers using the same, and apparatus for performing the same
In a method of aligning wafers, a second wafer having at least one second alignment key may be arranged over a first wafer having at least one first alignment key. At least one alignment hole may be formed by passing through the second wafer to expose the second alignment key and the first alignment key. The first wafer and the second wafer may be aligned with each other using the first alignment key and the second alignment key exposed through the alignment hole. Thus, the first alignment key and the second alignment key exposed through the alignment hole may be positioned at a same vertical line to accurately align the first wafer with the second wafer.
Conveyance system
A conveyance system for conveying a workpiece to each of a plurality of processing apparatuses includes a conveyance passage disposed in a space directly above one processing apparatus of the plurality of processing apparatuses, an automated conveying vehicle for traveling on the conveyance passage, the automated conveying vehicle including a workpiece storage member having a housing space for housing a workpiece therein, a traveling member having a storage space for storing the workpiece storage member therein, a traveling mechanism mounted on the traveling member, a lifting and lowering mechanism disposed in the traveling member for lifting and lowering the workpiece storage member while suspending the workpiece storage member from above, and a receiver for receiving control signals.
Conveyance system
A conveyance system for conveying a workpiece to each of a plurality of processing apparatuses includes a conveyance passage, an automated conveying vehicle for travelling on the conveyance passage, the automated conveying vehicle including a workpiece storage member, travelling mechanisms, and a receiver, a stock unit including a storage member holding base and a receiver, and a storage member conveying unit for conveying the workpiece storage member between a region of the conveyance passage above the stock unit and the storage member holding base or between a region of the conveyance passage above the processing apparatus and the inside of the processing apparatus.
METHOD FOR MANUFACTURING SEMICONDUCTOR ELEMENT
A method for manufacturing a semiconductor element includes: providing a wafer comprising first and second regions at an upper surface of the wafer, the second region being located at a periphery of the first region and being at a lower position than the first region; and forming a semiconductor layer made of a nitride semiconductor at the upper surface of the wafer. In a top-view, the first region comprises an extension portion at an end portion of the first region in a first direction that passes through the center of the wafer parallel to an m-axis of the semiconductor layer, the extension portion extending in a direction from a center of the wafer toward an edge of the wafer or in a direction from an edge of the wafer toward a center of the wafer.