A semiconductor die is attached to a die pad of a leadframe. The semiconductor die attached to the die pad is arranged in a molding cavity between complementary first and second mold portions. Package material is injected into the molding cavity via at least one injection channel provided in one of the complementary first and second mold portions. Air is evacuated from the molding cavity via at least one air venting channel provided in the other of the complementary first and second mold portions. An exit from the at least one air venting channel may be blocked by a retractable stopper during the injection of the package material.

A substrate processing apparatus includes a chamber in which a first processing space, a second processing space, a connecting space connecting the first processing space and the second processing space, a first hole connecting with the connecting space and a second hole connecting with the connecting space are formed, a first gate valve having a first valve element and closing the first hole, the first valve element sliding in the first hole, opening and closing the connecting space, and a second gate valve having a second valve element and closing the second hole, the second valve element sliding in the second hole, opening and closing the connecting space, wherein a region in which the first hole and the connecting space connect with each other and a region in which the second hole and the connecting space connect with each other are one common region.

Disclosed is a wafer processing system, a dual gate system, and methods for operating these systems. The dual gate system may have a shaft, a first gate and a second gate coupled to the shaft at opposite sides thereof, and an actuator coupled to the shaft. The actuator is configured to tilt together the shaft, the first gate, and the second gate to a first sealed gate position or to a second sealed gate position. The actuator can be operated using a pneumatic mechanism, an electro-magnetic mechanism, or a cam follower mechanism.

An inspection device includes: a first light source configured to emit light through a diffusion plate; a second light source configured to emit light through a focusing optical component; and a camera configured to take an image of a resin molded substrate irradiated with the light from the first light source and the second light source.

An etching method includes etching a silicon substrate with a liquid composition containing an alkaline organic compound, water, and a boron compound with a content in the range of 1% by mass to 14% by mass. The boron compound is at least one of boron sesquioxide, sodium tetraborate, metaboric acid, sodium perborate, sodium borohydride, zinc borate, and ammonium borate.

The present disclosure provides a semiconductor fabrication apparatus. The semiconductor apparatus includes a processing chamber; a substrate stage provided in the processing chamber and being configured to secure and rotate a semiconductor wafer; a gas injector configured to inject a chemical to the processing chamber; a window attached to the gas injector; and an adjustable fastening device coupled with the gas injector and the window.

Methods and apparatus for reducing leakage of microwaves at a slit valve of a process chamber. A multi-frequency resonant choke around the slit valve prevents microwave energy from a band of frequencies from escaping from the slit valve. The multi-frequency resonant choke may have a sloping bottom surface or a serrated bottom surface to enable multiple frequencies to resonant in the choke, canceling a range of microwave frequencies at gaps formed by a slit valve gate.

Disclosed herein is a method of manufacturing a packaged wafer including a step of forming grooves in a face side of a wafer along projected dicing lines to a depth than a finished thickness of the wafer, a step of forming a ring-shaped groove in and along a boundary between a device area and an outer peripheral excess area of the wafer to a depth larger than the depth of the grooves, and a step of placing a recess mold of a molding apparatus in engagement with the wafer so that a side wall of the recess mold is placed on a bottom of the ring-shaped groove and filling a space between the recess mold and the wafer with a molding resin.

Disclosed herein is a packaged wafer manufacturing method including the steps of forming a groove along each division line on the front side of a wafer, each groove having a depth greater than the finished thickness of the wafer, next removing a chamfered portion from the outer circumference of the wafer to thereby form a step portion having a depth greater than the depth of each groove, next setting a die of a molding apparatus on the bottom surface of the step portion of the wafer in the condition where a space is defined between the die and the wafer, and next filling a mold resin into this space. Accordingly, the device area of the wafer is covered with the mold resin and each groove of the wafer is filled with the mold resin to thereby obtain a packaged wafer.

Manufacturing a semiconductor apparatus includes preparing a support-base attached encapsulant including a thermosetting resin layer stacked as an encapsulant on a support base, coating a semiconductor-device mounting surface of a substrate on which semiconductor devices are mounted, or a semiconductor-device forming surface of a wafer on which semiconductor devices are formed with the thermosetting resin layer of the support-base attached encapsulant, heating and curing the thermosetting resin layer to collectively encapsulate the semiconductor-device mounting surface of the substrate or the semiconductor-device forming surface of the wafer, and cutting the encapsulated substrate or wafer by dicing. Coating includes surrounding a side face of the support-base attached encapsulant by a frame mechanism, holding the substrate or the wafer with the substrate or the wafer facing and spaced apart from the thermosetting resin layer of the support-base attached encapsulant, and vacuum laminating the support-base attached encapsulant together with the substrate or the wafer.