Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having at least one diode region; forming at least one first fin on the semiconductor substrate in the diode region; forming a first doped layer containing a first type of doping ions having a first conductivity in the first fin; and forming a second doped layer doped containing a second type of doping ions having a second conductivity opposite to the first conductivity on the first doped layer. A size of an interface between the first doped layer and the second doped layer along a width direction of the first fin is greater than a width of the first fin.

A compound semiconductor field effect transistor may include a channel layer. The compound semiconductor transistor may also include a multi-layer epitaxial barrier layer on the channel layer. The channel layer may be on a doped buffer layer or on a first un-doped buffer layer. The compound semiconductor field effect transistor may further include a gate. The gate may be on a first tier of the multi-layer epitaxial barrier layer, and through a space between portions of a second tier of the multi-layer epitaxial barrier layer.

When III-V semiconductor material is bonded to an oxide material, water molecules can degrade the bonding if they become trapped at the interface between the III-V material and the oxide material. Because water molecules can diffuse readily through oxide material, and may not diffuse as readily through III-V material or through silicon, forcing the III-V material against the oxide material can force water molecules at the interface into the oxide material and away from the interface. Water molecules present at the interface can be forced during manufacturing through vertical channels in a silicon layer into a buried oxide layer thereby to enhance bonding between the III-V material and the oxide material. Water molecules can be also forced through lateral channels in the oxide material, past a periphery of the III-V material, and, through diffusion, out of the oxide material into the atmosphere.

Methods are provided for fabricating a HEMT (high-electron-mobility transistor) that involve sequential epitaxial growth of III-nitride channel and barrier layers, followed by epitaxial regrowth of further III-nitride material through a window in a mask layer. The regrowth takes place on the barrier layer, only in the access region or regions. Devices made according to the disclosed methods are also provided.

When III-V semiconductor material is bonded to an oxide material, water molecules can degrade the bonding if they become trapped at the interface between the III-V material and the oxide material. Because water molecules can diffuse readily through oxide material, and may not diffuse as readily through III-V material or through silicon, forcing the III-V material against the oxide material can force water molecules at the interface into the oxide material and away from the interface. Water molecules present at the interface can be forced during manufacturing through vertical channels in a silicon layer into a buried oxide layer thereby to enhance bonding between the III-V material and the oxide material. Water molecules can be also forced through lateral channels in the oxide material, past a periphery of the III-V material, and, through diffusion, out of the oxide material into the atmosphere.

A method of forming a semiconductor device includes providing a heterojunction semiconductor body. The heterojunction semiconductor body includes a type III-V semiconductor back-barrier region, a type III-V semiconductor channel layer formed on the back-barrier region, and a type III-V semiconductor barrier layer formed on the back-barrier region. A first two-dimensional charge carrier gas is at an interface between the channel and barrier layers. A second two-dimensional charge carrier gas is disposed below the first two-dimensional charge carrier gas. A deep contact structure in the heterojunction semiconductor body that extends through the channel layer and forms an interface with the second two-dimensional charge carrier gas is formed. The first semiconductor region includes a first contact material that provides a conductive path for majority carriers of the second two-dimensional charge carrier gas at the interface with the second two-dimensional charge carrier gas.

Semiconductor structures with reduced parasitic capacitance between interconnects and ground, for example, are described. In one case, a semiconductor structure includes a substrate and a low dielectric constant material region in the substrate. The low dielectric constant material region is positioned between a first device area in the semiconductor structure and a second device area in the semiconductor structure. The semiconductor structure also includes a III-nitride material layer over the substrate. The III-nitride material layer extends over the substrate in the first device area, over the low dielectric constant material region, and over the substrate in the second device area. The semiconductor structure can also include a first device formed in the III-nitride material layer in the first device area, a second device in the III-nitride material layer in the second device area, and an interconnect formed over the low dielectric constant material region. The interconnect can provide a continuous conductive path of metal from the first device area, over the low dielectric constant material region, and to the second device area.

A method for making a semiconductor structure includes defining one or more device areas and one or more interconnect areas on a silicon substrate, forming trenches in the interconnect areas of the silicon substrate, oxidizing the silicon substrate in the trenches to form silicon dioxide regions, forming a III-nitride material layer on the surface of the silicon substrate, forming devices in the device areas of the gallium nitride layer, and forming interconnects in the interconnect areas. The silicon dioxide regions reduce parasitic capacitance between the interconnects and ground.

When III-V semiconductor material is bonded to an oxide material, water molecules can degrade the bonding if they become trapped at the interface between the III-V material and the oxide material. Because water molecules can diffuse readily through oxide material, and may not diffuse as readily through III-V material or through silicon, forcing the III-V material against the oxide material can force water molecules at the interface into the oxide material and away from the interface. Water molecules present at the interface can be forced during manufacturing through vertical channels in a silicon layer into a buried oxide layer thereby to enhance bonding between the III-V material and the oxide material. Water molecules can be also forced through lateral channels in the oxide material, past a periphery of the III-V material, and, through diffusion, out of the oxide material into the atmosphere.

A method of forming a semiconductor device includes providing a heterojunction semiconductor body. The heterojunction semiconductor body includes a type III-V semiconductor back-barrier region, a type III-V semiconductor channel layer formed on the back-barrier region, and a type III-V semiconductor barrier layer formed on the back-barrier region. A first two-dimensional charge carrier gas is at an interface between the channel and barrier layers. A second two-dimensional charge carrier gas is disposed below the first two-dimensional charge carrier gas. A deep contact structure in the heterojunction semiconductor body that extends through the channel layer and forms an interface with the second two-dimensional charge carrier gas is formed. The first semiconductor region includes a first contact material that provides a conductive path for majority carriers of the second two-dimensional charge carrier gas at the interface with the second two-dimensional charge carrier gas.