Provided is a semiconductor package in which a bonding structure is formed using metal grains included in metal powder layers having a coefficient of thermal expansion (CTE) similar with those of a substrate and a conductor so as to minimize generation of cracks and to improve reliability of bonded parts.

A semiconductor device may be provided with a first member, a second member joined to a first region of the first member via a first solder layer and a third member joined to a second region of the first member via a second solder layer. The first region and the second region are located on one side of the first member. The first solder layer contains a plurality of support particles that is constituted of a material having a higher melting point than the first solder layer. The second solder layer does not contain any support particles.

An electric apparatus includes: a first stacked body in which a first semiconductor chip having a first switch is stacked on a first mounting portion; a second stacked body in which a second semiconductor chip having a second switch is stacked on a second mounting portion; a temperature sensor provided in the first stacked body to detect a temperature of the first switch; and a current sensor provided in the second stacked body to detect a current flowing through the second switch. The second stacked body has a heat dissipation property higher than that of the first stacked body.

A package structure of an embedded power module includes a top insulation layer, a top metal pattern layer, a solder layer, a device layer, a bottom metal pattern layer and a bottom insulation layer sequentially arranged from top to bottom. The device layer includes at least two MOSFET bare dies and several metal connection blocks, and is filled with insulation filler to isolate the MOSFET bare dies and the metal connection blocks from each other. The drain electrodes of the bare dies are connected with the top metal pattern layer through the solder layer, and the source electrodes and the gate electrodes of the bare dies are electrically connected to the bottom metal pattern layer, respectively. The upper and lower surfaces of the metal connection blocks are electrically connected to the top metal pattern layer and the bottom metal pattern layer, respectively.

A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A first metal frame is disposed over the substrate around the first semiconductor die. A first metal lid is disposed over the first metal frame. A flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame. An edge of the flap can have a castellated edge. A recess in the first metal frame and a protrusion on the first metal lid can be used to latch the first metal lid onto the first metal frame. A second metal frame and second metal lid can be disposed over an opposite surface of the substrate from the first metal frame.

A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A first metal frame is disposed over the substrate around the first semiconductor die. A first metal lid is disposed over the first metal frame. A flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame. An edge of the flap can have a castellated edge. A recess in the first metal frame and a protrusion on the first metal lid can be used to latch the first metal lid onto the first metal frame. A second metal frame and second metal lid can be disposed over an opposite surface of the substrate from the first metal frame.

The provided power semiconductor module is configured to reduce the wiring inductance and save space on the substrate by establishing a multi-parallel connection between multiple power semiconductor chips. It consists of a first and second insulated substrates with a plurality of semiconductor switching elements positioned on one and facing the other. There are also first and second spacer conductors positioned between the plurality of semiconductor switching elements and the second insulated substrate. Inter-spacer-conductor wiring parts are connected with the plurality of second spacer conductors. Each of the plurality of semiconductor switching elements has a first electrode connected to a conductor layer on the first substrate, a second electrode connected to a conductor on the second substrate via the first spacer conductors, and a control electrode connected to each other through the second spacer conductors and the inter-spacer-conductor wiring parts which are positioned a prescribed distance from the second conductor layer.

A semiconductor device includes a semiconductor chip, first and second conductive members disposed on opposite sides of the semiconductor chip. The semiconductor chip includes a semiconductor substrate, a surface electrode and gate wirings. The semiconductor substrate has active regions formed with elements, and an inactive region not formed with an element. The inactive region includes an inter-inactive portion disposed between at least two active regions and an outer peripheral inactive portion disposed on an outer periphery of the at least two active regions. The surface electrode is disposed to continuously extend above the at least two active regions and the inter-inactive portion. The gate wirings are disposed above the inactive region, and include a first gate wiring disposed on an outer periphery of the surface electrode, and a second gate electrode disposed at a position facing the surface electrode.

A semiconductor module includes: a semiconductor element; and a sealing member. The semiconductor element includes: a semiconductor substrate; a protection film on the semiconductor substrate; a metal film on the semiconductor substrate and having at least a part located between the semiconductor substrate and the protection film; and a dummy metal film on the semiconductor substrate between the metal film and the protection film. The surface of the semiconductor substrate has a recess. The protection film has an other recess or a hole. The dummy metal film is arranged in both the recess of the semiconductor substrate and the other recess or the hole of the protection film.

An electronic module is provided, which comprises a plurality of first field effect transistors (FETs), a plurality of second FETs paired with the first FETs, a controller connected to gate nodes of the first and second FETs, and a plurality of spring assemblies disposed between the paired first and second FETs. Each spring assembly has two ends comprises a disc spring that is clamped and at least one conductive path that connects both ends of the spring assembly. One end of the spring assembly is connected to a press-buffer that contacts at least one first FET, while the other end is connected to another press-buffer that contacts at least one second FET.