Patent classifications
H01L23/4922
Low-Profile Microdisplay Module
Disclosed is a low-profile microdisplay module that comprises a package substrate, a microdisplay chip disposed over a first surface of the package substrate, and a plurality of conductive vias. The plurality of conductive vias are electrically coupled to the microdisplay chip and disposed through the package substrate to a second surface of the package substrate, the second surface being opposite and parallel to the first surface. The microdisplay module further comprises a flexible flat circuit connector coupled to the plurality of conductive vias at the second surface of the package substrate.
Anisotropic electroconductive particles
An anisotropic electroconductive particle including a first insulating layer, a first conductive layer disposed on the first insulating layer, and a second insulating layer disposed on the first conductive layer.
POWER DEVICE CELL AND POWER ELECTRONICS ASSEMBLY INCLUDING THE POWER DEVICE CELL
A power device cell includes: a metallic body having a first main surface, a second main surface opposite the first main surface, and a side face vertically extending between the first and second main surfaces; a vertical power semiconductor die in a recess formed in the first main surface of the metallic body; and an organic and/or glass electrical insulator covering the second main surface of the metallic body such that the power device cell is electrically insulated at least at a first side that includes the organic and/or glass electrical insulator. The organic and/or glass electrical insulator is confined to the metallic body. A backside of the vertical power semiconductor die is configured to be at a different electric potential than a frontside of the vertical power semiconductor die. The metallic body is at the same electric potential as the backside of the vertical power semiconductor die.
High thermal dissipation, packaged electronic device and manufacturing process thereof
The packaged power electronic device has a bearing structure including a base section and a transverse section extending transversely to the base section. A die is bonded to the base section of the bearing structure and has a first terminal on a first main face and a second and a third terminal on a second main face. A package of insulating material embeds the semiconductor die, the second terminal, the third terminal and at least partially the carrying base. A first, a second and a third outer connection region are electrically coupled to the first, the second and the third terminals of the die, respectively, are laterally surrounded by the package and face the second main surface of the package. The transverse section of the bearing structure extends from the base section towards the second main surface of the package and has a higher height with respect to the die.
HIGH THERMAL DISSIPATION, PACKAGED ELECTRONIC DEVICE AND MANUFACTURING PROCESS THEREOF
The packaged power electronic device has a bearing structure including a base section and a transverse section extending transversely to the base section. A die is bonded to the base section of the bearing structure and has a first terminal on a first main face and a second and a third terminal on a second main face. A package of insulating material embeds the semiconductor die, the second terminal, the third terminal and at least partially the carrying base. A first, a second and a third outer connection region are electrically coupled to the first, the second and the third terminals of the die, respectively, are laterally surrounded by the package and face the second main surface of the package. The transverse section of the bearing structure extends from the base section towards the second main surface of the package and has a higher height with respect to the die.
Busbar with dielectric coating
An apparatus includes a busbar and a heat-generating electronic device mounted on a first side of the busbar, the heat-generating electronic device being electrically and thermally coupled to the first side of the busbar. The busbar includes an array of non-planar physical structures on a second side of the busbar opposite the first side of the busbar. The apparatus includes a dielectric coating on the array of non-planar physical structures, the dielectric coating defining a non-planar dielectric surface on the second side of the busbar.
Header for semiconductor package
A header for a semiconductor package, includes an eyelet having a first surface, a second surface opposite to the first surface, a side surface, and a through hole penetrating the eyelet from the first surface to the second surface, a lead inserted through the through hole, and a metal base bonded to the second surface of the eyelet. The lead is bent at the second surface of the eyelet and protrudes from the side surface of the eyelet in a plan view. The metal base is spaced apart from the lead. The lead, located at a position overlapping the eyelet in the plan view, is disposed within a thickness range of the metal base in a side view.