Package structures, modules containing such packages and methods of manufacture. are described. In an embodiment, a package includes a plurality of terminal pads, a plurality of passive components bonded to top sides of the plurality of terminal pads, a die bonded to top sides of the plurality of passive components and a molding compound encapsulating at least the plurality of passive components and the die.

A device that includes a printed circuit board (PCB), a metal conductor, and a transistor. The metal conductor includes first and second oppositely facing surfaces. The transistor includes first and second terminals between which current is transmitted when the transistor is activated, and a gate terminal for controlling the transistor. The first terminal is sintered to the first surface, and the gate is electrically connected to a trace on the PCB.

A packaged integrated circuit is provided. The packaged integrated circuit includes a die, a package including a base, a lid, and a plurality of package leads, and die attach adhesive for securing the die to the package base. the die includes a plurality of die pads. The die is secured to the base with the die attach adhesive. After the die is secured to the base, at least one of the plurality of die pads is electrically connected to at least one of the plurality of package leads with a printed bond connection. After printing the bond connection, the lid is sealed to the base.

A microelectronic package includes at least one microelectronic element having a front surface defining a plane, the plane of each microelectronic element parallel to the plane of any other microelectronic element. An encapsulation region overlying edge surfaces of each microelectronic element has first and second major surfaces substantially parallel to the plane of each microelectronic element and peripheral surfaces between the major surfaces. Wire bonds are electrically coupled with one or more first package contacts at the first major surface of the encapsulation region, each wire bond having a portion contacted and surrounded by the encapsulation region. Second package contacts at an interconnect surface being one or more of the second major surface and the peripheral surfaces include portions of the wire bonds at such surface, and/or electrically conductive structure electrically coupled with the wire bonds.

Methods, systems, and devices for enabling the use of a special, generic, or standard substrate for similar system SIP assemblies are disclosed. The required customization, which is defined by a system's interconnecting scheme, is done during package assembly by creating appropriate connections using wire bonds on pads that are placed on the substrate and intentionally left open for purpose of customization. The wire bond links can be changed as required for a given system design.

Conventional lead frames could neither be self-supporting nor be picked up by an automatic mounter through suction and mounted on a circuit board. Lead frame 15 is equipped with a plurality of leads 15d, each lead having a land-connection section 15c formed on one end of a pin-shaped terminal 15a with a bent section therebetween 15b; and a joining section 15e joining the plurality of leads 15d. The joining section 15e is formed by joining a base plate to the ends of land-connection sections 15c. This base plate makes the leads 15d stand upright and/or has a suction surface 15f which may be picked up by an automatic lead frame mounting device via suction.

A power semiconductor package is disclosed. The power semiconductor package includes a leadframe having partially etched segments and at least one non-etched segment, a first semiconductor die having a first power transistor and a driver integrated circuit (IC) monolithically formed thereon, a second semiconductor die having a second power transistor, wherein the first semiconductor die and the second semiconductor die are configured for attachment to the partially etched segments, and wherein the partially etched segments and the at least one non-etched segment enable the first semiconductor die to be coupled to the second semiconductor die by a legless conductive clip.

A molding type power module includes: a leadframe including a first step and a second step; a first planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the first step respectively; and a second planar power device including a first surface having electrodes and a second surface opposite to the first surface, the electrodes being correspondingly bond to the second step respectively, wherein, the first surface of the first planar power device and the first surface of the second planar power device face each other, the projected areas thereof on a vertical direction at least partially overlap, and the first planar power device at least has one electrode electronically connected with the electrodes of the second planar power device.

A semiconductor apparatus according to the invention of the present application includes a base plate, a lead frame having a first surface and a second surface being a surface opposite to the first surface, the second surface being bonded to an upper surface of the base plate, a semiconductor device provided on the first surface of the lead frame, and a mold resin covering the upper surface of the base plate, the lead frame, and the semiconductor device, wherein the mold resin is provided with a terminal insertion hole that extends from the surface of the mold resin to the lead frame and in which a press-fit terminal is inserted, and the lead frame is provided with an opening portion which intercommunicates with the terminal insertion hole and into which the press-fit terminal is press-fitted.

A package comprises a molding and a conductive terminal in contact with the molding and having a first surface exposed to a first surface of the molding. The conductive terminal includes a cavity having a first portion extending along at least half of the first surface of the conductive terminal and a second portion extending along less than half of the first surface of the conductive terminal.