A method of forming a packaged semiconductor device includes providing a conductive frame structure. The conductive frame structure includes a first frame having leadfingers configured for directly attaching to a semiconductor device, such as an integrated power semiconductor device that includes both power devices and logic type devices. The leadfingers are further configured to provide high current capacity and a high thermal dissipation capacity for the power device portion of the semiconductor device. In one embodiment, the conductive frame structure further includes a second frame joined to the first frame. The second frame includes a plurality of leads configured to electrically connect to low power device portions of the semiconductor device. A package body is formed to encapsulate the semiconductor device and at least portions of the leadfingers and leads.

A lead frame device includes a metallic outer frame member, a lead frame package preform, and an encapsulant. The metallic outer frame member includes a pair of spaced apart longitudinal and transverse sections. The lead frame package preform includes at least one die pad surrounded by the metallic outer frame member such that a gap is formed around the die pad within the metallic, and a plurality of spaced apart leads. Each of the spaced apart leads has a first portion connected to the metallic outer frame member, a second portion proximal to and spaced apart from the die pad, a top surface, and a recess indented from the top surface. The encapsulant is filled in the recess. The disclosure also provides a lead frame device assembly.

In one implementation, a semiconductor package includes an integrated circuit (IC) flip chip mounted on a first patterned conductive carrier, a second patterned conductive carrier situated over the IC, and a magnetic material situated over the second patterned conductive carrier. The semiconductor package also includes a third patterned conductive carrier situated over the magnetic material. The second patterned conductive carrier and the third patterned conductive carrier are electrically coupled so as to form windings of an integrated inductor in the semiconductor package.

A device that includes a printed circuit board (PCB), a metal conductor, and a transistor. The metal conductor includes first and second oppositely facing surfaces. The transistor includes first and second terminals between which current is transmitted when the transistor is activated, and a gate terminal for controlling the transistor. The first terminal is sintered to the first surface, and the gate is electrically connected to a trace on the PCB.

A semiconductor module includes: a semiconductor element; a first lead frame including a first portion on which the semiconductor element is mounted; a sealing member sealing the semiconductor element and the first portion; and a heat dissipation member which is integrated with the sealing member and dissipates heat generated in the semiconductor element. The heat dissipation member is insulated from the semiconductor element and the first portion by the sealing member. Therefore, the semiconductor module that is applicable to vertical semiconductor elements and ensures electrical insulation between the semiconductor element and the heat dissipation member when implementing the semiconductor module onto a circuit board, can be provided.

A method includes forming a first magnetic material on a first surface of a conductive loop, forming a second magnetic material on a second surface of the conductive loop opposite the first surface to form an inductor, attaching a semiconductor die to a leadframe, and attaching the inductor to the leadframe with solder balls. The semiconductor die is between the inductor and the leadframe. The conductive loop: spans parallel to the leadframe; or is between the first magnetic material and the second magnetic material.

An electronic component, in one embodiment, includes a semiconductor die, a die pad supporting the semiconductor die, and a plurality of leads that include a first set of metal lines and a second set of metal lines. The first set of metal lines cross over the second set of metal lines at crossings. The first set of metal lines is separated by a molding compound from the second set of metal line at the crossings. The first set of metal lines is in a same first plane parallel to the semiconductor die. Each of the second set of metal lines include a first portion oriented along the first set of metal lines and disposed in the first plane, and a second portion offset from the first portion. A plurality of electrical connections couple the semiconductor die to the plurality of leads.

A power semiconductor device includes a power semiconductor element, a controlling element, a first lead frame and a second lead frame, respectively, a first metal wire electrically connecting the power semiconductor element and the first lead frame, and a sealing body covering these components. The first lead frame includes a first inner lead having a connecting surface to which one end of the first metal wire is connected. Among surfaces of the sealing body, in a side surface, a resin inlet mark is formed in a side surface portion from which the first lead frame and the second lead frame do not project, the resin inlet mark being greater in surface roughness than another area. The resin inlet mark is formed opposite to a side where the first metal wire is positioned on the connecting surface when seen in the direction along the mounting surface.

A semiconductor device includes: a semiconductor element; a joined member that is joined to the semiconductor element and includes a nickel film; and a joining layer that is joined to the joined member and contains 2.0 wt % or higher of copper, in which the joining layer includes a solder portion and a Cu.sub.6Sn.sub.5 portion, base metal of the solder portion contains at least tin as a constituent element and contains elemental copper, and the Cu.sub.6Sn.sub.5 portion is in contact with the nickel film.

A method and system for a power module is provided. The power module includes a first substrate including a first conductive substrate having a first plurality of power semiconductor switches arranged thereon, and at least one second conductive substrate electrically coupled to the first conductive substrate. A first terminal is electrically coupled to the first conductive substrate. The power module also includes a second substrate including a third conductive substrate having a second plurality of power semiconductor switches arranged thereon, and at least one fourth conductive substrate electrically coupled to the third conductive substrate. The third conductive substrate is electrically coupled to the second conductive substrate. A second terminal is electrically coupled to the fourth conductive substrate.