H01L23/49575

SEMICONDUCTOR PACKAGE WITH CLIP ALIGNMENT NOTCH
20180012829 · 2018-01-11 · ·

An electronic component includes a leadframe and a first semiconductor die. The leadframe includes a leadframe top side, a leadframe bottom side opposite the leadframe top side, and a top notch at the leadframe top side. The top notch includes a top notch base located between the leadframe top side and the leadframe bottom side, and defining a notch length of the top notch, and can also include a top notch first sidewall extended, along the notch length, from the leadframe top side to the top notch base. The first semiconductor die can include a die top side a die bottom side opposite the die top side and mounted onto the leadframe top side, and a die perimeter. The top notch can be located outside the die perimeter. Other examples and related methods are also disclosed herein.

Semiconductor packages and methods of packaging semiconductor devices

An embodiment related to a device. The device includes a first die with first and second die surfaces. The second die surface is bonded to a first die attach pad (DAP) disposed on a first substrate surface of a package substrate and the first die surface includes a first die contact pad. The device also includes a first clip bond including a first clip bond horizontal planar portion attached to the first die contact pad on the first die surface, and a first clip bond vertical portion disposed on an edge of the first clip bond horizontal planar portion. The first clip bond vertical portion is attached to a first substrate bond pad on the first substrate surface. The device further includes a first conductive clip-die bonding layer with spacers on the first die contact pad of the first die. The first conductive clip-die bonding layer bonds the first clip bond horizontal planar portion to the first die contact pad, and the spacers maintain a uniform Bond Line Thickness (BLT) of the first conductive clip-die bonding layer.

Package with separate substrate sections

A package is disclosed. In one example, the package comprises a substrate having at least one first recess on a front side and at least one second recess on a back side, wherein the substrate is separated into a plurality of separate substrate sections by the at least one first recess and the at least one second recess, an electronic component mounted on the front side of the substrate, and a single encapsulant filling at least part of the at least one first recess and at least part of the at least one second recess. The encapsulant fully circumferentially surrounds sidewalls of at least one of the substrate sections.

Heat conduction pattern for cooling a power module

A semiconductor module includes: a switching device including a gate pad; an output unit including an output pad connected with the gate pad of the switching device through a wire and outputting a drive signal from the output pad to the switching device; a temperature protection circuit detecting temperature and performing protection operation; and a heat conduction pattern connected with the output pad, extending from the output pad toward the temperature protection circuit, and conducting heat generated at the switching device to the temperature protection circuit.

Semiconductor module and power conversion device

The present application provides a semiconductor module and a power conversion device wherein wiring inductance is reduced. The semiconductor module is characterized by including a semiconductor element, a first terminal on which the semiconductor element is mounted, a second terminal disposed in a periphery of the semiconductor element and having a multiple of wiring portions, and a multiple of connection lines extending in multiple directions from an upper face of the semiconductor element and connected to each of the multiple of wiring portions of the second terminal, wherein a free region is provided among the multiple of wiring portions, and the multiple of connection lines and the multiple of wiring portions forming current paths with each of the multiple of connection lines are of the same potential.

Semiconductor package structures and methods of manufacture

Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

STACKED DIE ASSEMBLY
20230240153 · 2023-07-27 ·

A sensor device comprising: a lead frame; a first/second semiconductor die having a first/second sensor structure at a first/second sensor location, and a plurality of first/second bond pads electrically connected to the lead frame; the semiconductor dies having a square or rectangular shape with a geometric center; the sensor locations are offset from the geometrical centers; the second die is stacked on top of the first die, and is rotated by a non-zero angle and optionally also offset or shifted with respect to the first die, such that a perpendicular projection of the first and second sensor location coincide.

SEMICONDUCTOR MODULE
20230238310 · 2023-07-27 · ·

This semiconductor module includes: a base plate formed in a plate shape; a terminal member; an electronic component joined to one surface of the base plate; and mold resin sealing the base plate, the terminal member, and the electronic component. The base plate and the terminal member are conductive members and are arranged with an interval therebetween on the same plane. Each of the base plate and the terminal member has a body portion and a terminal portion exposed to outside from the mold resin. The base plate has a through hole at an extension part which is a part extending toward the terminal portion and connected to the terminal portion, in the body portion.

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE
20230005826 · 2023-01-05 · ·

A semiconductor chip is arranged over a substrate in the form of a leadframe. A set of current-carrying formations configured as conductive ribbons are coupled to the semiconductor chip. The substrate does not include electrically conductive formations for electrically coupling the conductive ribbons to each other. Electrical contacts are formed via wedge bonding, for instance, between adjacent ones of the conductive ribbons so that a contact is provided between the adjacent ones of the conductive ribbons in support of a multi-formation current-carrying channel.

METHOD OF MANUFACTURING SUBSTRATES FOR SEMICONDUCTOR DEVICES, CORRESPONDING SUBSTRATE AND SEMICONDUCTOR DEVICE
20230005824 · 2023-01-05 · ·

Pre-molded leadframes for semiconductor devices are manufactured by molding electrically insulating material onto a laminar sculptured structure of electrically conductive material including semiconductor device component die pads. First and second die pads are coupled via a first extension from the first die pad and a second extension from the second die pad at neighboring locations on the front surface of the leadframe and a bridge formation coupling the first and second extensions at the bacpk surface of the leadframe. The bridge formation provides a sacrificial connection between the first and second extensions which is selectively removed after molding the electrically insulating material in order to decouple the first and second die pads from each other. The removal of the sacrificial connection leaves a cavity formed at the second surface of the leadframe without affecting the shape of the die pads.