A package substrate and package assembly including a package substrate including a substrate body including electrical routing features therein and a surface layer and a plurality of first and second contact points on the surface layer including a first pitch and a second pitch, respectively, wherein the plurality of first contact points and the plurality of second contact points are continuous posts to the respective ones of the electrical routing features. A method including forming first conductive vias in a package assembly, wherein the first conductive vias include substrate conductive vias to electrical routing features in a package substrate and bridge conductive vias to bridge surface routing features of a bridge substrate; forming a first surface layer and a second surface layer on the package substrate; and forming second conductive vias through each of the first surface layer and the second surface layer to the bridge conductive vias.

A semiconductor device is provided that includes a lead frame, a die attached to the lead frame using a first solder, a source clip and a gate clip attached to the die using a second solder, and a drain clip attached to the lead frame. The semiconductor device is inverted, so that the source clip and the gate clip are positioned on the bottom side of the semiconductor device, and the lead frame is positioned on the top side of the semiconductor device so that the lead frame is a top exposed drain clip.

An organic interposer includes: a first organic insulating layer including a groove; a first metal wire located in the groove; a barrier metal material covering the first metal wire; and a second metal wire located above the first metal wire, wherein the barrier metal material includes: a first barrier metal film interposed between the first metal wire and an inner surface of the groove; and a second barrier metal film located on the first metal wire, and wherein the second metal wire is in contact with both of the first barrier metal film and the second barrier metal film.

An interposer includes: a base substrate; an interconnection structure on a top surface of the base substrate and including a metal interconnection pattern; an upper passivation layer on the interconnection structure and having compressive stress; a lower passivation layer under a bottom surface of base substrate, the lower passivation layer having compressive stress that is less than the compressive stress of the upper passivation layer; a lower conductive layer under the lower passivation layer; and a through electrode penetrating the base substrate and the lower passivation layer. The through electrode electrically connects the lower conductive layer to the metal interconnection pattern of the interconnection structure.

A composite wiring substrate includes a first wiring substrate including a first connection terminal, a second wiring substrate including a second connection terminal facing the first connection terminal, and a joint material joining the first connection terminal and the second connection terminal. The first outline of the first connection terminal is inside the second outline of the second connection terminal in a plan view. The joint material includes a first portion formed of an intermetallic alloy of copper and tin, and contacting each of the first connection terminal and the second connection terminal, and a second portion formed of an alloy of tin and bismuth, and including a portion between the first outline and the second outline in the plan view. The second portion contains the bismuth at a higher concentration than in the eutectic composition of a tin-bismuth alloy, and is separated from the second connection terminal.

A method for producing a metal-ceramic substrate with electrically conductive vias includes: attaching a first metal layer in a planar manner to a first surface side of a ceramic layer; after attaching the first metal layer, introducing a copper hydroxide or copper acetate brine into holes in the ceramic layer delimiting a via, to form an assembly; converting the copper hydroxide or copper acetate brine into copper oxide; subjecting the assembly to a high-temperature step above 500° C. in which the copper oxide forms a copper body in the holes; and after converting the copper hydroxide or copper acetate brine into the copper oxide, attaching a second metal layer in a planar manner to a second surface side of the ceramic layer opposite the first surface side. The copper body produces an electrically conductive connection between the first and the second metal layers.

Some embodiments relate to a package. The package includes a first substrate, a second substrate, and an interposer frame between the first and second substrates. The first substrate has a first connection pad disposed on a first face thereof, and the second substrate has a second connection pad disposed on a second face thereof. The interposer frame is arranged between the first and second faces and generally separates the first substrate from the second substrate. The interposer frame includes a plurality of through substrate holes (TSHs) which pass entirely through the interposer frame. A TSH is aligned with the first and second connection pads, and solder extends through the TSH to electrically connect the first connection pad to the second connection pad.

A package assembly includes a substrate and at least a first die having a first contact array and a second contact array. First and second via assemblies are respectively coupled with the first and second contact arrays. Each of the first and second via assemblies includes a base pad, a cap assembly, and a via therebetween. One or more of the cap assembly or the via includes an electromigration resistant material to isolate each of the base pad and the cap assembly. Each first cap assembly and via of the first via assemblies has a first assembly profile less than a second assembly profile of each second cap assembly and via of the second via assemblies. The first and second cap assemblies have a common applied thickness in an application configuration. The first and second cap assemblies have a thickness variation of ten microns or less in a reflowed configuration.

One example of a pre-molded lead frame includes a mold body, a plurality of recesses, and a plurality of first leads. The mold body includes a first main surface and a second main surface opposite to the first main surface. Each recess of the plurality of recesses extends from the first main surface into the mold body. The plurality of first leads are coupled to the mold body and extend from a third surface of the mold body. The third surface extends between the first main surface and the second main surface.

Stacked die modules for semiconductor device assemblies and methods of manufacturing the modules are disclosed. In some embodiments, the module includes a shingled stack of semiconductor dies, each die having an uncovered porch with bond pads. Further, a dielectric structure partially encapsulates the shingled stack of semiconductor dies. The dielectric structure includes openings corresponding to the bond pads. The module also includes conductive structures disposed on the dielectric structure, where each of the conductive structures extends over at least one porch of the semiconductor dies to connect to at least one bond pad through a corresponding opening. The semiconductor device assembly may include a controller die attached to a package substrate, the controller die carrying one or more stacked die modules, and bonding wires connecting terminals of the modules to package bond pads.