A shared base plate includes a plurality of base portions to which a plurality of electronic components including semiconductor switching elements are to be mounted, and a terminal formed portion formed so as to extend from the base portion to the outer side. The terminal formed portion includes a discrimination terminal which is used as a terminal in one of a first semiconductor module and a second semiconductor module and which is not used as a terminal in the other one. If the discrimination terminal that is not used as a terminal is cut to be short, it becomes possible to easily discriminate the semiconductor module from another semiconductor module having the shared base plate by outer appearances.

A semiconductor module includes a laminated substrate including an insulating board and a plurality of circuit boards that are arranged on an upper face of the insulating board, the plurality of circuit boards including first and second circuit boards, a semiconductor element disposed on the first circuit board and including, on an upper face of the semiconductor element, a main electrode, a gate pad, and a gate runner electrically connected to the gate pad, and a first wiring member electrically connecting the main electrode to the second circuit board. The gate runner extends so as to divide the main electrode into a plurality of electrodes including a first main electrode at a first side and a second main electrode at a second side, and the first wiring member is arranged to cross over the gate runner.

In a general aspect, an apparatus can include an inner package including a first silicon carbide die having a die gate conductor coupled to a common gate conductor, and a second silicon carbide die having a die gate conductor coupled to the common gate conductor. The apparatus can include an outer package including a substrate coupled to the common gate conductor, and a clip coupled to the inner package and coupled to the substrate.

A semiconductor element is bonded to a circuit pattern integrated with an insulating layer and a heat radiation fin, a case is bonded to a peripheral edge of the heat radiation fin so as to surround the semiconductor element, the circuit pattern, and the insulating layer, and a sealing resin is sealed in a region surrounded by the insulating layer, the circuit pattern, and the case. An internal electrode includes a flat plate-shaped portion, and is provided with a through hole and a pair of bent and inclined-shaped support portions. The support portion is bonded to the circuit pattern, and the upper surface of the semiconductor element, the through hole, and an embossed portion provided around the through hole are bonded. The internal electrode, and an external electrode integrally molded with the case, are bonded.

A semiconductor package includes a die pad, a semiconductor die mounted on the die pad and comprising a first terminal facing away from the die pad and a second terminal facing and electrically connected to the die pad, an interconnect clip electrically connected to the first terminal, an encapsulant body of electrically insulating material that encapsulates the semiconductor die and the interconnect clip, and a first opening in the encapsulant body that exposes a surface of the interconnect clip, the encapsulant body comprises a lower surface, an upper surface opposite from the lower surface, and a first outer edge side extending between the lower surface and the upper surface, and the first opening is laterally offset from the first outer edge side.

A packaged half-bridge circuit includes a carrier having a dielectric core and a first layer of metallization formed on an upper surface of the carrier, first and second semiconductor chips, each including a first terminal, a second terminal, and a control terminal, and a conductive connector mounted on the upper surface of the carrier and electrically connected to the first layer of metallization. The first semiconductor chip is configured as a high-side switch of the half-bridge circuit. The second semiconductor chip is configured as a low-side switch of the half-bridge circuit. At least one of the first and second semiconductor chips is embedded within the dielectric core of the carrier. The conductive connector is electrically connected to one of the first and second terminals from one or both of the first and second semiconductor chips.

An electronic module has a first substrate 11, a first electronic element 13, a second electronic element 23, a second substrate 21, a first terminal part 110 provided on a side of the first substrate 11 and a second terminal part 120 provided on a side of the second substrate 21. The first terminal part 110 has a first surface direction extending part 114 and a first normal direction extending part 113 extending toward one side or the other side. The second terminal part 120 has a second surface direction extending part 124 and a second normal direction extending part 123 extending toward one side or the other side. The second surface direction extending part 124 is provided on one side of the first surface direction extending part 114, and the first surface direction extending part 114 and the second surface direction extending part 124 overlap one another in a surface direction.

A connecting strip of conductive elastic material having an arched shape having a concave side and a convex side. The connecting strip is fixed at the ends to a support carrying a die with the convex side facing the support. During bonding, the connecting strip undergoes elastic deformation and presses against the die, thus electrically connecting the at least one die to the support.

The present invention relates to a cooling system where a semiconductor component including a semiconductor chip and a cooling apparatus are joined, wherein a coolant is supplied to a substrate, on which a semiconductor chip is installed, through an opening member of the cooling apparatus so that a surface of the substrate may be directly cooled by the coolant so as to improve cooling efficiency, and a cooling post structure, which enables the coolant to smoothly flow, is used to further improve cooling efficiency.

A semiconductor package includes a mounting platform including an electrically insulating substrate and structured metallization layers, a semiconductor die mounted on an upper surface of the mounting platform, the semiconductor die including a first terminal and a second terminal, the first terminal disposed on a second surface of the semiconductor die that faces the mounting platform, the second terminal disposed on a first surface of the semiconductor die that faces away from the mounting platform, and a heat sink integrally formed in the mounting platform. The heat sink is directly underneath the semiconductor die and is thermally coupled to the semiconductor die. The heat sink extends from the upper surface of the mounting platform to a lower surface of the mounting platform. The heat sink includes one or more discrete metal blocks disposed within an opening formed in the electrically insulating substrate.