Patent classifications
H01L24/46
Semiconductor device and method of manufacturing the same
A semiconductor device with improved reliability is provided. The semiconductor device is characterized by its embodiments in that sloped portions are formed on connection parts between a pad and a lead-out wiring portion, respectively. This feature suppresses crack formation in a coating area where a part of the pad is covered with a surface protective film.
Ultra-thin embedded semiconductor device package and method of manufacturing thereof
A package structure includes a first dielectric layer, semiconductor device(s) attached to the first dielectric layer, and an embedding material applied to the first dielectric layer so as to embed the semiconductor device therein, the embedding material comprising one or more additional dielectric layers. Vias are formed through the first dielectric layer to the at least one semiconductor device, with metal interconnects formed in the vias to form electrical interconnections to the semiconductor device. Input/output (I/O) connections are located on one end of the package structure on one or more outward facing surfaces thereof to provide a second level connection to an external circuit. The package structure interfits with a connector on the external circuit to mount the package perpendicular to the external circuit, with the I/O connections being electrically connected to the connector to form the second level connection to the external circuit.
SEMICONDUCTOR PACKAGES
A semiconductor package is configured to include a package substrate, a semiconductor chip disposed on the package substrate, and bonding wires. The package substrate includes a first column of bond fingers disposed in a first layer and a second column of bond fingers disposed in a second layer. The semiconductor chip includes a first column of chip pads arrayed in a first column and a second column of chip pads arrayed in a second column adjacent to the first column. The first column of chip pads are connected to the first column of bond fingers, respectively, through first bonding wires, and the second column of chip pads are connected to the second column of bond fingers, respectively, through second bonding wires.
LEADFRAME-LESS LASER DIRECT STRUCTURING (LDS) PACKAGE
The present disclosure is directed to a semiconductor package including a first laser direct structuring (LDS) resin layer and a second LDS resin layer on the first LDS resin layer. Respective surfaces of the first LDS resin layer and the second LDS resin layer are patterned utilizing an LDS process by exposing the respective surfaces to a laser. Patterning the first and second LDS resin layers, respectively, activates additive material present within the first and second LDS resin layers, respectively, converting the additive material from a non-conductive state to a conductive state. The LDS process is followed by a chemical plating step and an electrolytic plating process to form conductive structure coupled to a plurality of die within the first and second LDS resin layers. A molding compound layer is formed on surfaces of the conductive structures and covers the surfaces of the conductive structures. After these steps have been completed, the first LDS resin layer and the second LDS resin layer are singulated along channels filled with conductive material.
SEMICONDUCTOR DEVICE
A semiconductor device includes: a main wiring wire electrically connected to a semiconductor element; a reinforcing wire connected to the semiconductor element, the reinforcing wire positioned on the same side as the semiconductor element or on the opposite side of the semiconductor element, with respect to the main wiring wire in a cross-sectional view; and a sealing resin configured to cover the semiconductor element, the main wiring wire, and the reinforcing wire. The reinforcing wire is connected to a plurality of portions of the semiconductor element, or both end portions of the reinforcing wire are positioned inside an outline of the semiconductor element in a plan view.
Leadframe package with side solder ball contact and method of manufacturing
The present disclosure is directed to a leadframe package having a side solder ball contact and methods of manufacturing the same. A plurality of solder balls are coupled to recesses in a leadframe before encapsulation and singulation. After singulation, a portion of each solder ball is exposed on sidewalls of the package. This ensures that the sidewalls of the leads are solder wettable, which allows for the formation of stronger joints when the package is coupled to a substrate. This increased adhesion reduces resistance at the joints and also mitigates the effects of expansion of the components in the package such that delamination is less likely to occur. As a result, packages with a side solder ball contact have increased life cycle expectancies.
CONNECTING STRIP FOR DISCRETE AND POWER ELECTRONIC DEVICES
A connecting strip of conductive elastic material having an arched shape having a concave side and a convex side. The connecting strip is fixed at the ends to a support carrying a die with the convex side facing the support. During bonding, the connecting strip undergoes elastic deformation and presses against the die, thus electrically connecting the at least one die to the support.
LIGHT-EMITTING SUBSTRATE, METHOD OF MANUFACTURING LIGHT-EMITTING SUBSTRATE, AND DISPLAY DEVICE
A light-emitting substrate, a method of manufacturing a light-emitting substrate, and a display device are provided. The light-emitting substrate includes: a first substrate, wherein the first substrate includes a first base substrate, a light-emitting diode arranged on the first base substrate, and a first conductive pad arranged on the first base substrate; a second substrate arranged opposite to the first substrate, wherein the second substrate includes a second base substrate, and a second conductive pad arranged on the second base substrate; and a bonding wire structure including a bonding wire, wherein the first conductive pad is located on a surface of the first substrate away from the second substrate, the second conductive pad is located on a surface of the second substrate away from the first substrate, and the bonding wire is configured to electrically connect the first conductive pad and the second conductive pad.
Semiconductor device having inner lead exposed from sealing resin, semiconductor device manufacturing method thereof, and power converter including the semiconductor device
Inner leads having die pads having upper surfaces to which semiconductor elements are mounted each have a stepped profile, and surfaces of portions of the inner leads are exposed from a sealing resin in plan view. Outer leads connected to the inner leads have first bends at side surfaces of the sealing resin to extend in a direction on a side of the upper surfaces of the die pads, so that a miniaturized semiconductor device can be obtained.
IMAGING ELEMENT AND METHOD FOR MANUFACTURING IMAGING ELEMENT
To prevent damage to an imaging element configured by bonding a plurality of semiconductor chips together. The imaging element includes a plurality of semiconductor chips each having a semiconductor substrate and a wiring region. One of the plurality of semiconductor chips is provided with a photoelectric conversion unit for performing photoelectric conversion of incident light. Two of the plurality of semiconductor chips are provided with first pads in which surfaces of wiring regions of the two semiconductor chips are bonded to each other and which are arranged on the surfaces of the wiring regions and bonded to each other. At least one of the two semiconductor chips is provided with a second pad arranged in the wiring region and having a protrusion formed thereon so as to face toward the bonded surface. The second pad is configured to have a size different from that of the first pad.