According to one embodiment, a semiconductor storage device includes: a plurality of first wiring layers stacked in a first direction; a first memory pillar including a first semiconductor layer extending in the first direction and penetrating the plurality of first wiring layers; a second wiring layer disposed above the first semiconductor layer; a second semiconductor layer including a first part disposed between the first semiconductor layer and the second wiring layer, a second part extending away from the first semiconductor layer, and a third part provided on the second part; a first insulating layer disposed between the first part and the second wiring layer and between the second part and the second wiring layer; and a second insulating layer provided on the first insulating layer and in contact with at least a portion of the second part.

A semiconductor storage device includes a substrate, a first wiring, a second wiring, a third wiring, a fourth wiring, a charge storage unit. The first wiring extends in a first direction along a surface of the substrate. The second wiring is aligned with the first wiring in a second direction intersecting with the first direction and extends in the first direction. The third wiring is in contact with the first wiring and the second wiring and includes a semiconductor. The fourth wiring is located between the first wiring and the second wiring, extends in a third direction intersecting with the first direction and the second direction, and is aligned with the third wiring in at least the first direction. The charge storage unit is located between the third wiring and the fourth wiring.

An external terminal electrode is attached to a frame, and the frame contains a first resin, and has a first adhered surface. A heat sink plate supports the frame, has an unmounted region where a power semiconductor element is to be mounted within the frame in plan view, is made of metal, and has a second adhered surface. An adhesive layer contains a second resin different from the first resin, and adheres the first adhered surface of the frame and the second adhered surface of the heat sink plate to each other. One of the first and second adhered surfaces includes a flat portion and a protruding portion. The protruding portion protrudes from the flat portion and opposes the other one of the first adhered surface and the second adhered surface with the adhesive layer therebetween.

Provided is a semiconductor device including: a bed having a bed surface; a semiconductor chip having a bottom surface larger than the bed surface, the semiconductor chip being provided such that a center of the bottom surface is disposed above the bed surface and the bottom surface having a first end and a second end; a joint material provided between the bed surface and the bottom surface; a plate-like first wire having a first surface and provided such that the first surface faces the first end; a plate-like second wire having a second surface and provided such that the second surface faces the second end; a first insulating film having a third surface and a fourth surface provided on an opposite side of the third surface, the third surface being in contact with the first end, the fourth surface being in contact with the first surface; and a second insulating film having a fifth surface and a sixth surface provided on an opposite side of the fifth surface, the fifth surface being in contact with the second end, the sixth surface being in contact with the first surface.

An electronic device having a package structure with conductive leads, first and second dies in the package structure, as well as first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing one another with a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate to form a capacitor. No other side of the first conductive plate directly faces a side of the second conductive plate, and no other side of the second conductive plate directly faces a side of the first conductive plate.

A method includes performing a first molding process to enclose a portion of a first semiconductor die in a first package structure with an opening that exposes a portion of a second semiconductor die mounted to the first semiconductor die, as well as performing a deposition process to deposit a stress absorbing material in the opening of the first package structure to cover the portion of the second semiconductor die, and performing a second molding process to enclose a portion of the stress absorbing structure in a second package structure that extends on a side of the first package structure.

An embodiment package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, a conductive line electrically connecting a first conductive via to a second conductive via, the conductive line including a first segment over the first integrated circuit die and having a first width, and a second segment over the first integrated circuit die having a second width larger than the first width, the second segment extending over a first boundary between the first integrated circuit die and the encapsulant.

A semiconductor device includes a semiconductor element, a terminal electrode, and internal wiring. The semiconductor element is housed in a case. The terminal electrode is provided electrically connectable to an outside of the case. The internal wiring is provided in the case and electrically connects the semiconductor element and the terminal electrode. The internal wiring includes a fuse portion provided at a part of the internal wiring and configured to be melted by an overcurrent. The fuse portion includes a plurality of metal wires which are a group of parallel wires. Of the plurality of metal wires, a first metal wire is higher in resistance value than a second metal wire laid on an outer side relative to the first metal wire.

A semiconductor package includes a conductive pad, a semiconductor die with an aluminum bond pad over a dielectric layer of the semiconductor die, a gold bump on the aluminum bond pad, a first intermetallic layer of gold and aluminum between the aluminum bond pad and the gold bump, a copper ball bond on the gold bump, a second intermetallic layer of copper and gold between the copper ball bond and the gold bump, a copper wire extending from the copper ball bond to the conductive pad, a stitch bond between the copper wire and the conductive pad.

An electronic device having a package structure with conductive leads, first and second dies in the package structure, as well as first and second conductive plates electrically coupled to the respective first and second dies and having respective first and second sides spaced apart from and directly facing one another with a portion of the package structure extending between the first side of the first conductive plate and the second side of the second conductive plate to form a capacitor. No other side of the first conductive plate directly faces a side of the second conductive plate, and no other side of the second conductive plate directly faces a side of the first conductive plate.