In one embodiment, methods for making semiconductor devices are disclosed.

Semiconductor assemblies using edge stacking and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise stacked semiconductor packages including a base substrate having a base surface, a side substrate having a side surface orthogonal to the base surface, and a die stack disposed over the base surface and having an outermost die with an outermost surface orthogonal to the side surface. The side substrate can be electrically coupled to the die stack via a plurality of interconnects extending from the side surface of the side substrate to the first surface of the first substrate or the third surface of the outermost die. The semiconductor packages can further comprise a conductive material at an outer surface of the side substrate, thereby allowing the semiconductor packages to be electrically coupled to neighboring semiconductor packages via the conductive material.

The present application discloses a chip socket, a testing fixture and a chip testing method thereof. The chip socket includes a pedestal, a plurality of conductive traces, a plurality of clamp structures, and a plurality of electrical contacts. The plurality of conductive traces are formed in the pedestal. The plurality of clamp structures are conductive and disposed on the first surface of the pedestal, and at least one of the plurality of clamp structures is coupled to a corresponding conductive trace and configured to clamp a solder ball of a chip to be tested. The plurality of electrical contacts are disposed on the second surface of the pedestal, and at least one of the plurality of electrical contacts is coupled to a corresponding clamp structure through a corresponding conductive trace.

Semiconductor assemblies and packages using edge stacking and associated systems and methods are disclosed herein. A semiconductor package may include (1) a base substrate having a base surface, (2) one or more dies attached over the base surface, and (3) a mold material encapsulating the base substrate and the one or more dies. The package may further include connectors on a side surface thereof, wherein the connectors are electrically coupled to the base substrate and/or the one or more dies. The connectors may be further configured to electrically couple the package to one or more neighboring semiconductor packages and/or electrical circuits.

Various leadframe implementations may include a conductive substrate electrically coupled to a first lead where the conductive substrate includes a first elevated region and a second elevated region on a first side of the conductive substrate. The first elevated region may include a first planar surface and the second elevated region may include a second planar surface on the first side of the conductive substrate. Various implementations may include where the first planar surface of the first elevated region and the second planar surface of the second elevated region are configured to attach to a contact pad of a semiconductor die. The first planar surface may include a curved edge. The second planar surface may include a polygonal shape. The curved edge of the first planar surface may be configured to laterally align with a curved edge of the contact pad of the semiconductor die.

Semiconductor assemblies using edge stacking and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise stacked semiconductor packages including a base substrate having a base surface, a side substrate having a side surface orthogonal to the base surface, and a die stack disposed over the base surface and having an outermost die with an outermost surface orthogonal to the side surface. The side substrate can be electrically coupled to the die stack via a plurality of interconnects extending from the side surface of the side substrate to the first surface of the first substrate or the third surface of the outermost die. The semiconductor packages can further comprise a conductive material at an outer surface of the side substrate, thereby allowing the semiconductor packages to be electrically coupled to neighboring semiconductor packages via the conductive material.

First, second, and third integrated devices each include one or more interconnecting structure. Each interconnecting structure includes (i) one or more interconnecting nodules extending from an edge surface of the device, (ii) one or more interconnect voids formed in an edge surface of the device, or (iii) both (i) and (ii). The one or more interconnecting structures on each of the first and second device is mated with the one or more interconnecting structures on the second device. The first integrated device includes a signal output, the third integrated device includes a signal input; and the second integrated device includes a conductor for conducting a signal from the signal output to the signal input.

Semiconductor assemblies using edge stacking and associated systems and methods are disclosed herein. In some embodiments, the semiconductor assemblies comprise stacked semiconductor packages including a base substrate having a base surface, a side substrate having a side surface orthogonal to the base surface, and a die stack disposed over the base surface and having an outermost die with an outermost surface orthogonal to the side surface. The side substrate can be electrically coupled to the die stack via a plurality of interconnects extending from the side surface of the side substrate to the first surface of the first substrate or the third surface of the outermost die. The semiconductor packages can further comprise a conductive material at an outer surface of the side substrate, thereby allowing the semiconductor packages to be electrically coupled to neighboring semiconductor packages via the conductive material.

In one embodiment, methods for making semiconductor devices are disclosed.

An electrical connector allowing a connection between two substantially facing electrical contacts respectively pertaining to a housing and a support, and including a main body including a first end for secure connection thereof to the housing and a second end for secure connection thereof to the support, the main body being bent in at least one bending area.