A method includes attaching a power electronic substrate to a bottom of a frame. The frame has a box-like rectangular shape with an open top and an open bottom. The method further includes disposing an external conductive terminal on the frame. The external conductive terminal has at least one terminal stub that extends on to the front surface of the power electronic substrate. The method further includes welding the at least one terminal stub to at least one circuit trace disposed on the front surface of the power electronic substrate.

A semiconductor guide pin is disclosed. Specific implementations may include a heatsink, one or more substrates coupled together, one or more pressfit pins coupled to the one or more substrates, and two or more guide pins coupled to the one or more substrates, where the two or more guide pins may have a height greater than the one or more pressfit pins.

A method of forming a semiconductor device includes providing a substrate that comprises a metal region, forming an encapsulant body of electrically insulating material on an upper surface of the metal region, forming an opening in the encapsulant body, and inserting a press-fit connector into the opening, wherein after inserting the press-fit connector into the opening, the press-fit connector is securely retained to the substrate and an interfacing end of the press-fit connector is electrically accessible.

A power chip includes: a first power switch, formed in a wafer region and having a first and a second metal electrodes; a second power switch, formed in the wafer region and having a third and a fourth metal electrodes, wherein the first and second power switches respectively constitute an upper bridge arm and a lower bridge arm of a bridge circuit, and the first and second power switches are alternately arranged; and a metal region, at least including a first metal layer and a second metal layer that are stacked, each metal layer including a first to a third electrodes, and electrodes with the same voltage potential in the metal layers are electrically coupled.

Systems including power device embedded PCBs coupled to cooling devices and methods of forming the same are disclosed. One system includes a power device embedded PCB stack, a cooling assembly including a cold plate having one or more recesses therein, and a buffer cell disposed within each of the one or more recesses. The cooling assembly is bonded to the PCB stack with a insulation substrate disposed therebetween. The cooling assembly is arranged such that the buffer cell faces the PCB stack and absorbs stress generated at an interface of the PCB stack and the cooling assembly.

Provided are a semiconductor device, a busbar, and a power converter that can suppress an increase in the size of the device and in inductance while ensuring insulation performance between terminals. For example, a semiconductor device 1 includes a first terminal 110 projecting from a sealing body 100 along a given direction, and a second terminal 120 adjacent to the first terminal 110 with a space formed between the second terminal 120 and the first terminal 110, the second terminal 120 projecting from the sealing body 100 along a given direction in a direction of projection that is the same as a direction of projection of the first terminal 110. The first terminal 110 has a first exposed part 112 exposed outside the sealing body 100. The second terminal 120 has a second sheathed part 121 projecting from the sealing body 100, the second sheathed part 121 being sheathed with an insulating material, and a second exposed part 122 projecting from the second sheathed part 121, the second exposed part 122 being exposed outside the sealing body 100. A distance D2 along a given direction from a front end 121a of the second sheathed part 121 to the sealing body 100 is longer than a distance D1 along the given direction from a front end 112a of the first exposed part 112 to the sealing body 100.

A component carrier includes a stack including at least one electrically conductive layer structure and at least one electrically insulating layer structure and a component connected to the stack. The component has a planar redistribution layer at a main surface thereof.

A power module includes a plurality of conductive wire groups and a sealing member. The plurality of conductive wire groups each include a first bonded portion and a second bonded portion. A maximum gap between intermediate portions of a pair of conductive wire groups adjacent to each other is larger than a first gap between the first bonded portions of the pair of conductive wire groups adjacent to each other. The maximum gap between the intermediate portions of the pair of conductive wire groups adjacent to each other is larger than a second gap between the second bonded portions of the pair of conductive wire groups adjacent to each other. Therefore, the power module is improved in reliability.

A semiconductor device includes a substrate, a resin case, and a wiring member having an exposed portion adjacent to a first fixing portion fixed in a wall surface of the resin case and exposed to outside, and a second fixing portion fixed in the wall surface of the resin case at a position different from the first fixing portion with respect to a portion extending from the first fixing portion into the resin case, in which the wiring member is bonded to a surface of the semiconductor element by solder in the resin case, and has a plate shape having a length, a thickness, and a width, in which the wiring member has the thickness being uniform and is flat in the resin case, and the width of the second fixing portion is narrower than the width of the exposed portion.

A spring electrode for a press-pack power semiconductor module includes a first electrode in contact with a power semiconductor chip, a second electrode arranged to face the first electrode, and a pressure pad which connects the first electrode and the second electrode and has flexibility in a normal direction of opposing surfaces of the first electrode and the second electrode. The opposing surfaces of the first electrode and the second electrode can be polygons of a pentagon or more, the pressure pad can be a cylindrical conductor or a plurality of wire conductors, and sides of the opposing surface of the first electrode and sides of the opposing surface of the second electrode corresponding to these sides are connected in parallel by the pressure pad.