Patent classifications
H01L25/072
Semiconductor device, semiconductor manufacturing apparatus and method of manufacturing semiconductor device having printed circuit board and insulating board with complementary warps
A semiconductor device includes: a first insulating circuit substrate; a first semiconductor chip mounted on a top surface of the first insulating circuit substrate; a printed circuit board arranged over the first insulating circuit substrate; a first external terminal inserted to the printed circuit board and having one end bonded to the top surface of the first insulating circuit substrate; and a first pin inserted to the printed circuit board and having one end bonded to a top surface of the first semiconductor chip, wherein the first insulating circuit substrate and the printed circuit board having warps complimentary to each other.
Module with power device
The present disclosure provides a module including a circuit board, a first component and a second component. The circuit board includes a first side and a second side opposite to each other and includes a first plane and second plane disposed on the first side. A first height difference is formed between the first plane and the second plane. The first component and the second component are disposed on the first plane and the second plane, respectively. The first component and the second component include a first contact surface and a second contact surface, respectively. The first contact surface and the second contact surface are coplanar with a first surface of the module. It benefits to reduce the design complexity of a heat-transfer component, and enhance the heat dissipation capability and the overall power density of the module simultaneously.
Semiconductor device having control terminal and control substrate
A semiconductor device includes: a case having an opening; a semiconductor element contained in the case; a control substrate which is disposed above the semiconductor element in the case and on which a control circuit to control the semiconductor element is disposed; a lid to cover the opening of the case; and a control terminal having one end portion connected to the control circuit disposed on the control substrate and the other end portion protruding out of the case. The control terminal has a bend in the case, and a side portion of the case or the lid is provided with a support capable of supporting the bend.
Semiconductor device
A semiconductor device includes a case enclosing a region filled with a sealing material. The case is made of resin. An electrode is fixed to the case. A section, which is a part of the electrode, is provided with a cutout that allows a part of the resin making the case to be exposed to the region.
Semiconductor device and semiconductor module using same
This semiconductor device includes: a plate-shaped heat dissipation plate; a plurality of switching elements joined to one surface of the heat dissipation plate; a first terminal located apart from the heat dissipation plate, extending in a direction away from the heat dissipation plate, and connected via first conductors to surfaces of the switching elements on a side opposite to the heat dissipation plate side; and a sealing member sealing the switching elements, the heat dissipation plate, and the first terminal. A cutout is provided at an outer periphery of the heat dissipation plate. A part of the first terminal on the heat dissipation plate side overlaps a cut-out area at the cutout as seen in a direction perpendicular to the one surface of the heat dissipation plate. A retracted portion retracted inward is formed at an outer periphery of another surface of the heat dissipation plate.
Semiconductor devices having a plurality of offsets in leads supporting stacked components and methods of manufacturing thereof
In one example, a semiconductor device includes a substrate having leads that include lead terminals, lead steps, and lead offsets extending between the lead steps so that at least some lead steps reside on different planes. A first electronic component is coupled to a first lead step side and includes a first electronic component first side, and a first electronic component second side opposite to the first electronic component first side. A second electronic component is coupled to a second lead step side, and includes a second electronic component first side, and a second electronic component second side opposite to the second electronic component first side. An encapsulant encapsulates the first electronic component, the second electronic component, and portions of the substrate. The lead terminals are exposed from a first side of the encapsulant. Other examples and related methods are also disclosed herein.
SEMICONDUCTOR DEVICE, SEMICONDUCTOR MODULE, AND POWER CONVERSION APPARATUS
An object is to provide a technique capable of improving the power efficiency of a semiconductor device. The semiconductor device includes first to sixth parallel connection bodies, each including a semiconductor switching element and a diode connected in antiparallel to the semiconductor switching element. At least one of the voltage drops of the second parallel connection body and the third parallel connection body is smaller than a voltage drop of at least one of the first parallel connection body, the fourth parallel connection body, the fifth parallel connection body, and the sixth parallel connection body.
SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING SEMICONDUCTOR MODULE
There are provided a semiconductor module capable of preventing the peeling of a sealing resin on the side where a connection section used for the connection to a semiconductor element is arranged and a manufacturing method for a semiconductor module. A semiconductor module includes: an outer frame; sealing resins; gate signal output terminals, and partition sections laid across the outer flame to partition a space into a plurality of housing sections, in the partition sections which the gate signal output terminals with connection sections exposed are arranged. The partition sections have through holes where sealing resins are formed, the sealing resins connecting adjacent housing sections and the sealing resin formed in the through hole being continuous with the sealing resins formed in the housing sections.
Semiconductor component having through-silicon vias
A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T.sub.1 at a first end of the opening, and a thickness T.sub.2 at a second end of the opening, and R.sub.1 is a ratio of T.sub.1 to T.sub.2. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T.sub.3 at the first end of the opening, a thickness T.sub.4 at the second end of the opening, R.sub.2 is a ratio of T.sub.3 to T.sub.4, and R.sub.1 is greater than R.sub.2.
SEMICONDUCTOR MODULE
Provided is a semiconductor module that can improve the insulation properties at terminals to which electric power is supplied. A semiconductor module includes a negative electrode terminal connected to a negative electrode side of direct current power; a positive electrode terminal disposed above the negative electrode terminal and connected to a positive electrode side of the direct current power in a state where an exposed portion of the negative electrode terminal including one end of the negative electrode terminal is exposed; an insulating sheet disposed between the negative electrode terminal and the positive electrode terminal for insulation between the negative electrode terminal and the positive electrode terminal in a state where an exposed portion of the insulating sheet is exposed between the one end of the negative electrode terminal and one end of the positive electrode terminal; and a first dielectric portion formed to cover at least a corner of the one end of the positive electrode terminal, the corner being in contact with the insulating sheet.