A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

A memory device includes a plurality of memory cells. A first memory cell of the plurality of memory cells includes a first write transistor includes a first write gate, a first write source, and a first write drain. A first read transistor includes first read gate, a first read source, a first read drain, and a first body region separating the first read source from the first read drain. The first read source is coupled to the first write source. A first capacitor has a first upper capacitor plate coupled to the first write drain and a first lower capacitor plate coupled to the first body region of the first read transistor.

A display device includes a substrate having a top surface, a bottom surface, and a first contact hole passing through the top surface and the bottom surface; a thin film transistor disposed above the top surface and including a semiconductor layer; a display element connected to the thin film transistor; a top conductive pattern disposed between the substrate and the thin film transistor and overlapping the semiconductor layer of the thin film transistor; a bottom conductive pattern disposed on the bottom surface and connected to the top conductive pattern through the first contact hole; and a bottom planarization layer disposed on the bottom surface, the bottom planarization layer disposed on the bottom conductive pattern.

An aperture ratio of a semiconductor device is improved. A driver circuit and a pixel are provided over one substrate, and a first thin film transistor in the driver circuit and a second thin film transistor in the pixel each include a gate electrode layer, a gate insulating layer over the gate electrode layer, an oxide semiconductor layer over the gate insulating layer, source and drain electrode layers over the oxide semiconductor layer, and an oxide insulating layer in contact with part of the oxide semiconductor layer over the gate insulating layer, the oxide semiconductor layer, and the source and drain electrode layers. The gate electrode layer, the gate insulating layer, the oxide semiconductor layer, the source and drain electrode layers, and the oxide insulating layer of the second thin film transistor each have a light-transmitting property.

A display substrate, including: a base, and a plurality of sub-pixels arranged on the base. At least one of the plurality of sub-pixels includes a pixel driving circuit and a light-emitting element electrically connected to the pixel driving circuit. The pixel driving circuit includes a plurality of transistors and at least one storage capacitor. In a direction perpendicular to the base, the display substrate includes: a semiconductor layer, a first metal layer, a second metal layer, a third metal layer and a fourth metal layer, which are sequentially arranged on the base. The semiconductor layer includes: an active layer of the plurality of transistors. The first metal layer includes at least a scanning line extending in a first direction, a gate electrode of the plurality of transistors, and a first capacitor electrode plate of the storage capacitor.

A semiconductor device with a small variation in characteristics is provided. A semiconductor device includes an oxide, a first conductor and a second conductor over the oxide, a first insulator over the first conductor, a second insulator over the second conductor, a third insulator over the first insulator and the second insulator, a fourth insulator over the third insulator, a fifth insulator that is over the oxide and placed between the first conductor and the second conductor, a sixth insulator over the fifth insulator, and a third conductor over the sixth insulator. The third conductor includes a region overlapping the oxide. The fifth insulator includes a region in contact with the oxide, the first conductor, the second conductor, and each of the first insulator to the fourth insulator. The fifth insulator contains nitrogen, oxygen, and silicon.

A pixel driving circuit includes a first thin film transistor having a double-gate structure, a conductive layer and a second thin film transistor. The first thin film transistor includes a first active layer. The first active layer includes a first and second semiconductor portions and a conductor portion located therebetween. The conductor portion has a first doping concentration. The conductive layer is at least partially opposite to the conductor portion, so that the conductive layer and the conductor portion form a capacitor. The conductive layer is configured to electrically connect to an initial voltage terminal. The second thin film transistor includes a second active layer and a first gate. A portion of the second active layer directly opposite to the first gate has a second doping concentration, and the second doping concentration is lower than the first doping concentration.

A back plate includes a base substrate, gate lines, data lines and power supply lines arranged on the base substrate crossing each other in rows and columns, and pixel structures arranged in an array on the base substrate, each pixel structure includes a driving transistor, a switching transistor connected thereto, and a pixel electrode connected thereto; a gate line and a data line are connected to the switching transistor, and a power supply line is connected to the driving transistor; in a same row or column of pixel structures, a power supply line is arranged between an (2n−1)th pixel structure and an 2n−th pixel structure, and the power supply line is connected to a source electrode of a driving transistor in the (2n−1)th pixel structure and a source electrode of a driving transistor in the 2n−th pixel structure; n is a positive integer greater than or equal to 1.

A display substrate, including: a display region and a peripheral region located on the periphery of the display region. A scan driver circuit is disposed in the peripheral region. A plurality of sub-pixels, and a plurality of first signal lines that are connected to the scan driver circuit and extend in a first direction, are disposed in the display region. The display region includes: a substrate, and a semiconductor layer, a first conductive layer, a second conductive layer and a third conductive layer that are sequentially disposed on the substrate. The third conductive layer comprises: a plurality of first signal lines, and first electrodes and second electrodes of a plurality of transistors. An insulating layer between the third conductive layer and the first conductive layer is provided with first via holes.

A display device including: a substrate including a main area and a sub-area at a side of the main area; a thin-film transistor on the substrate and positioned in the main area; a first insulating layer on a gate electrode of the thin-film transistor; a light-emitting element on the first insulating layer, positioned in the main area, and electrically connected to the thin-film transistor; a plurality of pads on the first insulating layer and positioned in the sub-area; and a light-blocking layer overlapping the plurality of pads and located between the substrate and the first insulating layer.