A method of manufacturing a silicon carbide semiconductor device includes a step of forming gate trench, a step of forming Schottky trench, a step of forming a silicon oxide film in the gate trench and the Schottky trench, a step of forming a polycrystalline silicon film inside the silicon oxide film, a step of etching back the polycrystalline silicon film, a step of forming an interlayer insulating film on a gate electrode in the gate trench, a step of removing, by wet etching, the polycrystalline silicon film in the Schottky trench after opening a hole in the interlayer insulating film, a step of forming an ohmic electrode on a source region, a step of removing the silicon oxide film in the Schottky trench, and a step of forming a source electrode in the Schottky trench, which is in Schottky junction with a drift layer.

An electron extraction type free-wheeling diode device and a preparation method thereof are provided by the present disclosure, and more than one first structures for increasing the density of electron extraction pathways are provided on a N-type drift region. Each of the first structures includes a lightly doped P-type base region, a heavily doped N-type emitter region located on the lightly doped P-type base region, a P-type trench anode region, and a trench region located on the P-type trench anode region. The barrier height of the punch-through NPN triode can be tuned in a wide range, which has beneficial effects on soft and fast adjustment of the reverse recovery process.

An n.sup.+-type SiC substrate constituting an n.sup.+-type drain region contains a concentration of nitrogen, which is a donor, within a predetermined range (predetermined impurity concentration of the n.sup.+-type drain region) and, as impurities other than the nitrogen, contains boron, aluminum, and titanium such that a sum of respective concentrations of the boron, aluminum, and titanium is an amount that does not affect the n-type impurity concentration of the n.sup.+-type SiC substrate (impurity concentration of the n.sup.+-type drain region). The boron, aluminum, and titanium in the n.sup.+-type SiC substrate function as a lifetime killer of majority carriers. The boron concentration of the n.sup.+-type SiC substrate is in a range of 5×10.sup.16/cm.sup.3 to 1×10.sup.17/cm.sup.3. The aluminum concentration and the concentration of the titanium concentration of the n.sup.+-type SiC substrate are each within a range of 1×10.sup.16/cm.sup.3 to 5×10.sup.16/cm.sup.3.

A feeder design is manufactured as a structure in a SiC semiconductor material comprising at least two p-type grids in an n-type SiC material (3), comprising at least one epitaxially grown p-type region, wherein an Ohmic contact is applied on the at least one epitaxially grown p-type region, wherein an epitaxially grown n-type layer is applied on at least a part of the at least two p-type grids and the n-type SiC material (3) wherein the at least two p-type grids (4, 5) are applied in at least a first and a second regions at least close to the at least first and second corners respectively and that there is a region in the n-type SiC material (3) between the first and a second regions without any grids.

A semiconductor device includes an SiC semiconductor layer which has a first main surface on one side and a second main surface on the other side, a semiconductor element which is formed in the first main surface, a raised portion group which includes a plurality of raised portions formed at intervals from each other at the second main surface and has a first portion in which some of the raised portions among the plurality of raised portions overlap each other in a first direction view as viewed in a first direction which is one of the plane directions of the second main surface, and an electrode which is formed on the second main surface and connected to the raised portion group.

A vertical semiconductor device includes one or more of a substrate, a buffer layer over the substrate, one or more drift layers over the buffer layer, and a spreading layer over the one or more drift layers.

A semiconductor substrate (1) according to an embodiment includes: a hexagonal SiC single crystal layer (13I); an SiC epitaxial growth layer (12E) disposed on an Si plane of an SiC single crystal layer (13I); and an SiC polycrystalline growth layer (18PC) disposed on a C plane opposite to the Si plane of the SiC single crystal layer (13I). The SiC single crystal layer (13I) includes a single crystal SiC thin layer (10HE) obtained by weakening the hydrogen ion implantation layer (10HI), and a phosphorus ion implantation layer (10PI). The phosphorus ion implantation layer (10PI) is disposed between the single crystal SiC thin layer (10HE) and the SiC polycrystalline growth layer (18PC). Consequently, the present disclosure provides a low-cost and high-quality semiconductor substrate and a fabrication method thereof.

A semiconductor device manufacturing method includes a step which prepares a wafer source and a supporting member, a supporting step which supports the wafer source by the supporting member, and a wafer separating step in which the wafer source is cut in a horizontal direction from a thickness direction intermediate portion of the wafer source to separate, from the wafer source, a wafer structure which includes the supporting member and a wafer cut away from the wafer source.

A SiC Schottky rectifier with surge current ruggedness is described. The Schottky rectifier includes one or more multi-layer bodies that provide multiple types of surge current protection.

An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.