Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.

Disclosed herein is a new and improved system and method for fabricating diamond semiconductors. The method may include the steps of selecting a diamond semiconductor material having a surface, exposing the surface to a source gas in an etching chamber, forming a carbide interface contact layer on the surface; and forming a metal layer on the interface layer.

The present disclosure relates to a wide band-gap merged p-i-n/Schottky, MPS, diode, and to a method of manufacturing the same. The present disclosure particularly relates to Silicon Carbide, SiC, MPS diodes. According to the present disclosure, the MPS diode includes different Schottky contacts with different IV characteristics, and/or ohmic contacts with a different contact resistance and/or threshold voltage. This allows the conduction area of the MPS diode to change more gradually with forward bias thereby avoiding drawbacks associated with a large conduction area when switching from a forward biasing mode to a reverse biasing mode. Therefore, the dynamic switching performance can be improved in a wide operation voltage range.

The present disclosure relates to a wide band-gap merged p-i-n/Schottky, MPS, diode, and to a method of manufacturing the same. The present disclosure particularly relates to Silicon Carbide, SiC, MPS diodes. According to the present disclosure, the MPS diode includes different Schottky contacts with different IV characteristics, and/or ohmic contacts with a different contact resistance and/or threshold voltage. This allows the conduction area of the MPS diode to change more gradually with forward bias thereby avoiding drawbacks associated with a large conduction area when switching from a forward biasing mode to a reverse biasing mode. Therefore, the dynamic switching performance can be improved in a wide operation voltage range.

Monolithic multi-throw diode switch structures are described. The monolithic multi-throw diode switches include a hybrid arrangement of diodes with different intrinsic regions. In one example, a method of manufacture of a monolithic multi-throw diode switch includes providing an intrinsic layer on an N-type semiconductor substrate, implanting a first P-type region to a first depth into the intrinsic layer to form a first PIN diode comprising a first effective intrinsic region of a first thickness, implanting a second P-type region to a second depth into the intrinsic layer to form a second PIN diode comprising a second effective intrinsic region of a second thickness, and forming at least one metal layer over the intrinsic layer to electrically couple the first PIN diode to a node between a common port and a first port of the switch.

Disclosed herein are IC devices, packages, and device assemblies that include diodes arranged so that their first and second terminals may be contacted from the opposite faces of a support structure. Such diodes are referred to herein as “vertical diodes” to reflect the fact that the diode extends, in a vertical direction (i.e., in a direction perpendicular to the support structure), between the bottom and the top of support structures. Vertical diodes as described herein may introduce additional degrees of freedom in diode choices in terms of, e.g., high-voltage handling, capacitance modulation, and speed.

Disclosed herein are IC devices, packages, and device assemblies that include diodes arranged so that their first and second terminals may be contacted from the opposite faces of a support structure. Such diodes are referred to herein as “vertical diodes” to reflect the fact that the diode extends, in a vertical direction (i.e., in a direction perpendicular to the support structure), between the bottom and the top of support structures. Vertical diodes as described herein may introduce additional degrees of freedom in diode choices in terms of, e.g., high-voltage handling, capacitance modulation, and speed.

A method for fabricating a low-gain avalanche diode (LGAD) device is provided. The method includes: forming a low-resistivity n-type semiconductor substrate in a first silicon wafer; forming a p-type gain layer in an upper surface of a high-resistivity p-type second silicon wafer; bonding the first and second wafers such that the upper surface of the second wafer proximate the gain layer contacts the semiconductor substrate in the first wafer to form a bonded wafer structure, whereby a back surface of the second wafer becomes an upper surface of the bonded wafer structure; forming a plurality of p-type electrodes in the upper surface of the bonded wafer structure; and forming a conductive layer on at least a portion of the respective p-type electrodes and on a back surface of the semiconductor substrate, the conductive layer providing electrical connection to the LGAD device.

A method for fabricating a low-gain avalanche diode (LGAD) device is provided. The method includes: forming a low-resistivity n-type semiconductor substrate in a first silicon wafer; forming a p-type gain layer in an upper surface of a high-resistivity p-type second silicon wafer; bonding the first and second wafers such that the upper surface of the second wafer proximate the gain layer contacts the semiconductor substrate in the first wafer to form a bonded wafer structure, whereby a back surface of the second wafer becomes an upper surface of the bonded wafer structure; forming a plurality of p-type electrodes in the upper surface of the bonded wafer structure; and forming a conductive layer on at least a portion of the respective p-type electrodes and on a back surface of the semiconductor substrate, the conductive layer providing electrical connection to the LGAD device.

Overvoltage protection circuits are provided. In some embodiments, an overvoltage protection circuit includes a first diode made of a first semiconductor material having a bandgap width greater than that of silicon. A second diode is included and is electrically cross-coupled with the first diode. The second diode is made of a second semiconductor material different from the first semiconductor material.