Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

Disclosed is an active photonic device having a Darlington configuration with a substrate and a collector layer that is over the substrate. The collector layer includes an inner collector region. An outer collector region substantially surrounds the inner collector region and is spaced apart from the inner collector region. A base layer is over the collector layer. A first outer base region and a second outer base region substantially surround the inner base region and are spaced apart from the inner base region and each other. An emitter layer is over the base layer. The emitter layer includes an inner emitter region that is ring-shaped and resides over and extends substantially around an outer periphery of the inner base region. A first outer emitter region and a second outer emitter region substantially surround the inner emitter region and are spaced apart from the inner emitter region and each other.

In a method of manufacturing a silicon carbide semiconductor device including a vertical switching element having a trench gate structure, with the use of a substrate having an off angle with respect to a (0001) plane or a (000-1) plane, a trench is formed from a surface of a source region to a depth reaching a drift layer through a base region so that a side wall surface of the trench faces a (11-20) plane or a (1-100) plane, and a gate oxide film is formed without performing sacrificial oxidation after formation of the trench.

A silicon carbide semiconductor device includes a silicon carbide layer and a gate insulating layer. The silicon carbide layer has a main surface. The gate insulating layer is arranged as being in contact with the main surface of the silicon carbide layer. The silicon carbide layer includes a drift region having a first conductivity type, a body region having a second conductivity type different from the first conductivity type and being in contact with the drift region, a source region having the first conductivity type and arranged as being spaced apart from the drift region by the body region, and a protruding region arranged to protrude from at least one side of the source region and the drift region into the body region, being in contact with the gate insulating layer, and having the first conductivity type.

A semiconductor device of according to an embodiment of the present disclosure includes a n-type SiC layer; a SiC region provided on the n-type SiC layer and containing H (hydrogen) or D (deuterium) in an amount of 1×10.sup.18 cm.sup.−3 or more and 1×10.sup.22 cm.sup.−3 or less; and a metal layer provided on the SiC region.

The present application relates to semiconductor photodetectors, in particular to a silicon carbide-based UV-visible-NIR full-spectrum-responsive photodetector and a method for fabricating the same. The photodetector includes a silicon carbide substrate, and metal counter electrodes and a surface plasmon polariton nanostructure arranged thereon. The silicon carbide substrate and the metal counter electrodes constitute a metal-semiconductor-metal photodetector with coplanar electrodes. When the ultraviolet light is input, free carriers directly generated in silicon carbide are collected by an external circuit to generate electrical signals. When the visible light is input, hot carriers generated in the surface plasmon polariton nanostructure tunnel into the silicon carbide semiconductor to become free carriers to generate electrical signals.

A disclosed super-junction (SJ) device includes a first epitaxial (epi) layer that forms a first SJ layer of the SJ device, and includes a second epi layer disposed on the first SJ layer that forms a device layer of the SJ device. An active area of the first and second epi layers includes a first set of SJ pillars comprising a particular doping concentration of a first conductivity type and a second set of SJ pillars comprising the particular doping concentration of a second conductivity type. A termination area of the first and second epi layers has a minimized epi doping concentration of the first conductivity type that is less than the particular doping concentration, and the termination area of the second epi layer includes a plurality of floating regions of the second conductivity type that form a junction termination of the SJ device.

A semiconductor device for infrared detection comprises a stack of a first semiconductor layer, a second semiconductor layer and an optical coupling layer. The first semiconductor layer has a first type of conductivity and the second semiconductor layer has a second type of conductivity. The optical coupling layer comprises an optical coupler and at least a first lateral absorber region. The optical coupler is configured to deflect incident light towards the first lateral absorber region. The first lateral absorber region comprises an absorber material with a bandgap Eg in the infrared, IR.

A semiconductor device for infrared detection comprises a stack of a first semiconductor layer, a second semiconductor layer and an optical coupling layer. The first semiconductor layer has a first type of conductivity and the second semiconductor layer has a second type of conductivity. The optical coupling layer comprises an optical coupler and at least a first lateral absorber region. The optical coupler is configured to deflect incident light towards the first lateral absorber region. The first lateral absorber region comprises an absorber material with a bandgap Eg in the infrared, IR.

An SBD includes a semiconductor substrate; an anode electrode which is in Schottky contact with a front surface of the semiconductor substrate; and a cathode electrode which is in ohmic contact with a rear surface of the semiconductor substrate. A trench extending from the front surface of the semiconductor substrate toward the rear surface of the semiconductor substrate is provided in the semiconductor substrate, and an inner surface of the trench is covered with an insulating film. An insulating layer is deposited at a deep portion of the trench, and a conductive layer is deposited at a shallow portion of the trench. An n-type front surface region in contact with the anode electrode, an n-type rear surface region in contact with the cathode electrode, and an n-type intermediate region connecting the front surface region and the rear surface region are provided in the semiconductor substrate.