A PIN photodetector includes an n-type semiconductor layer, an n-type semiconductor cap layer, a first plurality of p-type regions located within the n-type semiconductor cap layer and separated from one another by a distance d.sub.1, and an absorber layer located between the n-type semiconductor layer and the n-type semiconductor cap layer including the first plurality of p-type regions. The plurality of p-type regions are electrically connected to one another to provide an electrical response to light incident to the PIN photodetector.

A photodetector having a small form factor and having high detection efficiency with respect to both visible light and infrared rays may include a first electrode, a collector layer on the first electrode, a tunnel barrier layer on the collector layer, a graphene layer on the tunnel barrier layer, an emitter layer on the graphene layer, and a second electrode on the emitter layer. The photodetector may be included in an image sensor. An image sensor may include a substrate, an insulating layer on the substrate, and a plurality of photodetectors on the insulating layer. The photodetectors may be aligned with each other in a direction extending parallel or perpendicular to a top surface of the insulating layer. The photodetector may be included in a LiDAR system.

A structural body that includes a film that has a phase-separated nanostructure where a separate columnar shape phase is dispersed in a matrix phase that are phase-separated in a state of thermal equilibrium. The matrix phase is formed from any one of a p-type semiconductor material and an n-type semiconductor material, and the separate columnar shape phase is formed from the other semiconductor material. The film is formed on a substrate such that the separate columnar shaped phase and the matrix phase have three-dimensional junction planes.

The present invention relates to a method for manufacturing a photovoltaic device comprising: —forming a porous first conducting layer on one side of a porous insulating substrate, —coating the first conducting layer with a layer of grains of a doped semiconducting material to form a structure, —performing a first heat treatment of the structure to bond the grains to the first conducting layer, —forming electrically insulating layers on surfaces of the first conducting layer, —forming a second conducting layer on an opposite side of the porous insulating substrate, —applying a charge conducting material onto the surfaces of the grains, inside pores of the first conducting layer, and inside pores of the insulating substrate, and—electrically connecting the charge conducting material to the second conducting layer.

A photodetector is provided. The photodetector includes a bottom electrode region in a semiconductor layer, a light absorption material in the semiconductor layer, and a first buffer layer sandwiched between a bottom surface of the light absorption material and the semiconductor layer. The first buffer layer includes, from bottom to top, a first Si layer, a first SiGe layer, a second Si layer, and a second SiGe layer. A first atomic percentage of Ge in the first SiGe layer is less than a second atomic percentage of Ge in the second SiGe layer. The photodetector further includes a top electrode region over the light absorption material.

There is to provide a semiconductor device including a light receiving element capable of reducing the manufacturing cost and improving the optical performance of the light receiving element. For example, a p type germanium layer, an intrinsic germanium layer, and an n type germanium layer forming the structure body of a Ge photodiode are formed according to a continuous selective epitaxial growth. An insulating film having an opening portion is formed on the silicon layer of a SOI substrate, and an intrinsic germanium layer is formed bulging from the opening portion to above the insulating film. In short, by using the insulating film having the opening portion, the cross section of the intrinsic germanium layer is formed into a mushroom shape.

A photoelectric conversion element includes a semiconductor, an intrinsic layer disposed on the semiconductor and containing hydrogenated amorphous silicon, a first-conductivity-type layer that covers a part of the intrinsic layer and contains hydrogenated amorphous silicon of a first conductivity type, a second-conductivity-type layer that covers a part of the intrinsic layer and contains hydrogenated amorphous silicon of a second conductivity type, an insulating film covering an end region of the first-conductivity-type layer, a first electrode disposed on the first-conductivity-type layer, and a second electrode disposed on the second-conductivity-type layer. An end portion of the second-conductivity-type layer is located on the insulating film or above the insulating film.

This invention relates to a novel structure of photovoltaic devices (e.g. photovoltaic cells also called as solar cells) are provided. The cells are based on the micro or nano scaled structures which could not only increase the surface area but also have the capability of reducing the reflection and increasing the absorption of incident light. More specifically, the structures are based on 3D structure which are made of electric materials covering semiconductors, insulators, dielectric, polymer, and metallic type materials. By using such structures reflection loss of the light from the cell is significantly reduced, increasing the absorption, which results in increasing the conversion efficiency of the solar cell, and reducing the usage of material while increasing the flexibility of the solar cell. The structures can be also used in other optical devices wherein the reflection loss and absorption are required to enhance significantly improve the device performances.

Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.

A solar cell includes a semiconductor substrate of first conductivity type, including first and second principal surfaces; a region of the first conductivity type, including a semiconductor layer structure of the first conductivity type provided on the first principal surface; and a region of an second conductivity type, including a semiconductor layer structure of the second conductivity type provided on the first principal surface. The semiconductor layer structure of the first conductivity type is formed extending into the region of the second conductivity type. Thereby the solar cell is provided with a stack region where the semiconductor layer structure of the second conductivity type is formed on the semiconductor layer structure of the first conductivity type.