An isotropic neutron detector includes a spherical secondary particle radiator component and a plurality of stacked semiconductor detectors. A first semiconductor detector is coupled to at least a portion of the spherical secondary particle radiator component, forming a portion of a first concentric shell thereover. A second semiconductor detector coupled to at least a portion of the first semiconductor detector, forming a portion of a second concentric shell thereover.

An SOI wafer contains a compressively stressed buried insulator structure. In one example, the stressed buried insulator (BOX) may be formed on a host wafer by forming silicon oxide, silicon nitride and silicon oxide layers so that the silicon nitride layer is compressively stressed. Wafer bonding provides the surface silicon layer over the stressed insulator layer. Preferred implementations of the invention form MOS transistors by etching isolation trenches into a preferred SOI substrate having a stressed BOX structure to define transistor active areas on the surface of the SOI substrate. Most preferably the trenches are formed deep enough to penetrate through the stressed BOX structure and some distance into the underlying silicon portion of the substrate. The overlying silicon active regions will have tensile stress induced due to elastic edge relaxation.

A centroid contact radiation detector system/method providing for low capacitance and noise insensitivity is disclosed. The system incorporates a P-type/N-type bulk germanium volume (PGEV/NGEV) having an internal well cavity void (IWCV). The external NGEV surfaces incorporate an N+/P+ electrode and the surface of the IWCV incorporates a centrally located P+/N+ contact (CPPC). The IWCV surface is constructed and the CPPC is positioned within the IWCV so as to provide uniform symmetric field distribution within the PGEV/NGEV and improved noise immunity. The CPPC may be formed using point, reduced-area, medium-area, large-area, hemispherical, semi-hemispherical, and cylindrical annulus contact constructions. The PGEV/NGEV may be constructed using cylindrical, regular polyhedral, or spherical forms.

A surface of the first semiconductor crystalline material has a reduced roughness. A semiconductor device includes a low defect, strained second semiconductor crystalline material over the surface of the first crystalline material. A surface of the strained second semiconductor crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by creating process parameters that reduce impurities at an interfacial boundary between the first and second semiconductor crystalline materials. In one embodiment, the first semiconductor crystalline material can be confined by an opening in an insulator having an aspect ratio sufficient to trap defects using Aspect Ratio Trapping techniques.

A combination of doping, rapid pulsed optical and/or thermal annealing, and unique detector structure reduces or eliminates sources of electronic noise in a CdZnTe (CZT) detector. According to several embodiments, methods of forming a detector exhibiting minimal electronic noise include: pulse-annealing at least one surface of a detector comprising CZT for one or more pulses, each pulse having a duration of 0.1 seconds or less. The at least one surface may optionally be ion-implanted. In another embodiment, a CZT detector includes a detector surface with two or more electrodes operating at different electric potentials and coupled to the detector surface; and one or more ion-implanted CZT surfaces on or in the detector surface, each of the one or more ion-implanted CZT surfaces being independently connected to one of the two or more electrodes and the surface of the detector. At least two of the ion-implanted surfaces are in electrical contact.

A combination of doping, rapid pulsed optical and/or thermal annealing, and unique detector structure reduces or eliminates sources of electronic noise in a CdZnTe (CZT) detector. According to several embodiments, methods of forming a detector exhibiting minimal electronic noise include: pulse-annealing at least one surface of a detector comprising CZT for one or more pulses, each pulse having a duration of 0.1 seconds or less. The at least one surface may optionally be ion-implanted. In another embodiment, a CZT detector includes a detector surface with two or more electrodes operating at different electric potentials and coupled to the detector surface; and one or more ion-implanted CZT surfaces on or in the detector surface, each of the one or more ion-implanted CZT surfaces being independently connected to one of the two or more electrodes and the surface of the detector. At least two of the ion-implanted surfaces are in electrical contact.

Provided is a detector that includes a scintillator, a common electrode, a pixel electrode, and a plurality of insulating layers, with a plurality of nano-pillars formed in the plurality of insulating layers, a nano-scale well structure between adjacent nano-pillars, with a-Se separating the adjacent nano-pillars, and a method for operation thereof.

Provided is a detector that includes a scintillator, a common electrode, a pixel electrode, and a plurality of insulating layers, with a plurality of nano-pillars formed in the plurality of insulating layers, a nano-scale well structure between adjacent nano-pillars, with a-Se separating the adjacent nano-pillars, and a method for operation thereof.

There is provided a radiation detector using SiC and of a structure in which an electric field is applied to the interior of the entire SiC crystal constituting a radiation sensible layer, aiming to detect radiation while suppressing a reduction in electric signals generated in the radiation sensible layer.

The radiation detector includes: a radiation sensible layer formed of silicon carbide and configured to generate an electron hole pair due to radiation entering it; a first semiconductor region in contact with a first principal surface of the radiation sensible layer and exhibiting a first impurity concentration at least in the region in contact with the radiation sensible layer; a second semiconductor region in contact with a second principal surface on the opposite side of the first principal surface and exhibiting a second impurity concentration at least in the region in contact with the radiation sensible layer; a first electrode connected to the first semiconductor region; and a second electrode connected to the second semiconductor region. The impurity concentration in the radiation sensible layer adjacent to the first semiconductor region, with the first principal surface serving as a border, is discontinuous with the first impurity concentration; the impurity concentration in the radiation sensible layer adjacent to the second semiconductor region, with the second principal surface serving as a border, is discontinuous with the second impurity concentration; and an electric field is applied to the entire radiation sensible layer in the depth direction thereof at a voltage during operation.

Provided is a detector that includes a scintillator, a common electrode, a pixel electrode, and a plurality of insulating layers, with a plurality of nano-pillars formed in the plurality of insulating layers, a nano-scale well structure between adjacent nano-pillars, with a-Se separating the adjacent nano-pillars, and a method for operation thereof.