A method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid is provided to improve upon the complexity of the conventional method for manufacturing light-emitting diode die. The method for manufacturing an indium gallium nitride/gallium nitride quantum-well pyramid includes performing a first epitaxial reaction and then a second epitaxial reaction on a substrate under 600-650 C. to form a gallium nitride pyramid, growing an first indium gallium nitride layer on an end face of the gallium nitride pyramid, where the end face is away from the substrate, and growing a first gallium nitride layer on the first indium gallium nitride layer. A flux ratio of nitrogen to gallium of the first epitaxial reaction is 25:1-35:1, and a flux ratio of nitrogen to gallium of the second epitaxial reaction is 130:1-150:1.

A light emitting diode (LED) including a first contact. The LED further includes a first semiconductor layer over the first contact. The first semiconductor layer comprises hexagonal Boron Nitride. Additionally, the LED includes a second semiconductor layer over the first semiconductor layer. The second semiconductor layer comprises at least one hexagonal Boron Nitride quantum well and at least one hexagonal Boron Nitride quantum barrier. Moreover, the LED includes a third semiconductor layer over the second semiconductor layer. The third semiconductor layer comprises hexagonal Boron Nitride. Further, the LED includes a second contact over the third semiconductor layer.

A light emitting device having first, second and third dimensions that are orthogonal may include a light emitting semiconductor device configured to emit light via a first surface in a plane formed by the first and second dimensions. The light emitting device may further include a wavelength converting structure disposed on the first surface of the light emitting semiconductor device, the wavelength converting structure extending beyond the light emitting semiconductor device in the first dimension and the light emitting semiconductor device extending beyond the wavelength converting structure in the second dimension. The light emitting device may further include one or more optical extraction features in at least one gap formed by the wavelength converting structure extending beyond the light emitting semiconductor structure in the first dimension and/or formed by the light emitting semiconductor structure extending beyond the wavelength converting structure in the second dimension.

A heterostructure for use in an electronic or optoelectronic device is provided. The heterostructure includes one or more semiconductor layers containing columnar nanostructures (e.g., nanowires). The nanowire semiconductor layer can include sub-layers of varying composition, at least one of which is an active layer that can include quantum wells and barriers. A heterostructure can include n-type and p-type semiconductor contact layers adjacent to the nanowire semiconductor layer containing the active layer.

A semiconductor chip (100) is provided, having a first semiconductor layer (1), which has a lateral variation of a material composition along at least one direction of extent. Additionally provided is a method for producing a semiconductor chip (100).

A semiconductor substrate structure and process for fabrication of the semiconductor substrate structure are described. The semiconductor substrate structure includes a silicon carbide (SiC) wafer substrate, an active gallium nitride (GaN) layer and a layer of microcrystalline diamond (MCD) layer disposed between the SiC wafer substrate and the GaN active layer. The MCD) layer is bonded to the SiC wafer substrate and to the GaN active layer.

A surface roughening method includes the following steps: preparing a first epitaxial layer of a three-dimensional island shape growth over a light emitting structure; and preparing a discontinuous second epitaxial layer over the first epitaxial layer. The surface roughening method provided in the present application is simple and convenient, and improves the efficiency. In addition to the epitaxial growth process, it is not necessary to use an additional process such as wet etching, photonic crystal and other processes to further process the surface of the epitaxial layer, and the method may be implemented by means of one process in a same reaction equipment.

Method for producing a device with light emitting/light receiving diodes, comprising: producing, on a substrate, a stack including first and second doped semiconductor layers; first etching of the stack, forming first openings through the entire thickness of the second layer; producing dielectric portions covering, in the first openings, the side walls of the second layer; second etching of the stack, extending the first openings until reaching the substrate, delimiting the p-n junctions of the diodes; etching extending the first openings into a part of the substrate; producing first electrically conductive portions in the first openings, forming first electrodes of the diodes, and producing second electrodes electrically connected to the second layer; eliminating the substrate, forming a collimation grid.

The present invention discloses a semiconductor structure with an epitaxial layer and method of manufacturing the same. The semiconductor structure with the epitaxial layer includes a substrate, a blocking layer on the substrate, multiple recesses formed in the substrate, wherein the recess extends along <111> crystal faces of the substrate, and an epitaxial layer on the blocking layer, wherein the epitaxial layer is provided with a buried portion in each recess and a surface portion formed on the blocking layer.

In accordance with some embodiments of the present disclosure, a semiconductor device (e.g., a light-emitting device) is provided. The semiconductor device may include a first epitaxial layer of a first group III-V material, a superlattice layer grown on the first epitaxial layer of the first group III-V material, and a second epitaxial layer of the first group iii-v material grown on the superlattice layer. In some embodiments, the superlattice layer may include the first group III-V material and a second group III-V material. In some embodiments, the first epitaxial layer may include the first group III-V material of a semipolar orientation. The semipolar orientation may include at least one of at least one of a (2021) orientation, a (2021) orientation, a (3031) orientation, or a (3031) orientation including off-axis orientations within 4 degrees. The second epitaxial layer may include the first group III-V material of the semipolar orientation.