A transfer-printable (e.g., micro-transfer-printable) device source wafer comprises a growth substrate comprising a growth material, a plurality of device structures comprising one or more device materials different from the growth material, the device structures disposed on and laterally spaced apart over the growth substrate, each device structure comprising a device, and a patterned dissociation interface disposed between each device structure of the plurality of device structures and the growth substrate. The growth material is more transparent to a desired frequency of electromagnetic radiation than at least one of the one or more device materials. The patterned dissociation interface has one or more areas of relatively greater adhesion each defining an anchor between the growth substrate and a device structure of the plurality of device structures and one or more dissociated areas of relatively lesser adhesion between the growth substrate and the device structure of the plurality of device structures.

A semiconductor device includes a substrate and a buffer layer disposed on a first portion, a second portion, and a third portion of the substrate. The semiconductor device further includes a multilayer light-emitting diode (LED) stack disposed on the first portion of the substrate, and an optical sensor disposed on the second portion of the substrate. The semiconductor device further includes at least one electrode disposed on the third portion of the substrate, a first conductor in contact with the multilayer LED stack, and a second conductor in contact with the optical sensor. The at least one electrode, the first conductor, and the second conductor are formed of a glassy carbon material.

Disclosed herein are techniques relating to wafer-to-wafer bonding for manufacturing light-emitting diodes (LEDs). In some embodiments, a method includes reducing bowing of a layered structure including a semiconductor material and a substrate on which the semiconductor material is formed by generating breakages, fractures, or at least one region of weakened bonding within the layered structure. The method also includes bonding a base wafer to the semiconductor material, removing the substrate from the semiconductor material, and forming a plurality of trenches through the semiconductor material to produce a plurality of LEDs.

Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

Disclosed are a deterministic quantum emitter operating at room temperature in an optical communication wavelength using the intersubband transition of a nitride-based semiconductor quantum dot, a method of fabricating the same, and an operating method thereof. A method of fabricating a quantum emitter includes forming a three-dimensional (3-D) structure in a substrate, forming an n type-doped thin film at the upper part of the 3-D structure, forming a quantum dot over the n type-doped thin film, regrowing the 3-D structure in order to use the 3-D structure as an optical structure, depositing a metal thin film at a vertex of the 3-D structure, and connecting electrodes to an n type-doped area and the metal thin film, respectively. A carrier may be captured in the quantum dot by applying a voltage to the connected electrodes. The quantum emitter may be driven by optically exciting the quantum dot.

Monolithic pixels are implemented by laterally disposed green, blue and red micro-LED sub-pixels separated by dielectric sidewalls. The green and blue sub-pixels are formed with nitride-based material layers while the red sub-pixel is formed with non-nitride-based material layers that yield an optically-efficient red sub-pixel that is intensity-balanced with the green and blue sub-pixels.

A multi-junction optoelectronic device and method of fabrication are disclosed. In an aspect, the method includes forming a first p-n structure on a substrate, the first p-n structure including a semiconductor having a lattice constant that matches a lattice constant of the substrate; forming one or more additional p-n structures on the first p-n structure, each of the one or more additional p-n structures including a semiconductor having a lattice constant that matches the lattice constant of the substrate, the semiconductor of a last of the one or more additional p-n structures that is formed including a dilute nitride, and the multi-junction optoelectronic device including the first p-n structure and the one or more additional p-n structures; and separating the multi-junction optoelectronic device from the substrate. In some implementations, it is possible to have the dilute nitride followed by a group IV p-n structure.

One or more chips are transferred from one substrate to another by using one or more polymer layers to secure the one or more chips to an intermediate carrier substrate. While secured to the intermediate carrier substrate, the one or more chips may be transported or put through further processing or fabrication steps. To release the one or more chips, the adhesion strength of the one or more polymer layers is gradually reduced to minimize potential damage to the one or more chips.

Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.

A light emitting element includes: a semiconductor structure including: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer, wherein a resistance of a peripheral portion of the p-side nitride semiconductor layer is higher than a resistance of an area inside of the peripheral portion in a top view, wherein a p-side nitride semiconductor side of the semiconductor structure is a light extraction face side, and an n-side nitride semiconductor side of the semiconductor structure is a mounting face side; and first protective layer located on an upper face of the p-side nitride semiconductor layer in a region corresponding to the peripheral portion of the p-side nitride semiconductor layer.