A display device comprises a substrate, a pixel electrode on the substrate, a light emitting element on the pixel electrode, and a common electrode layer on the light emitting element, and configured to receive a common voltage, wherein the light emitting element configured to emit a first light according to a driving current having a first current density, is configured to emit a second light according to a driving current having a second current density, and is configured to emit a third light according to a driving current having a third current density.

A light emitting diode (LED) array includes bottom reflectors patterned as an array of closed shapes on a top plane of a base layer for III-N growth. A three-dimensional III-N structure is epitaxially grown around the array of closed shapes and extending above the bottom reflectors. The three-dimensional III-N structures is a contiguous crystalline structure extending across the array. A laterally grown III-N layer is formed in contact with both the reflectors and the three-dimensional III-N structures, and III-N LED layers are grown on the laterally grown layer. One or more top reflectors are grown or deposited on the III-N LED layers and located over the bottom reflectors.

LED chips and related fabrication methods are disclosed. A LED chip includes an active layer arranged on or over a light-transmissive substrate having a light extraction surface. The light extraction surface comprises a microtextured etched surface having a non-repeating, irregular textural pattern (e.g., with an average feature depth in a range of from 120 nm to 400 nm, and preferably free of any plurality of equally sized, shaped, and spaced textural features). The microtextured etched surface may be formed by applying a micromask having first and second solid materials of different etching rates over the light extraction surface, and exposing the micromask to an etchant (e.g., via reactive ion etching) to form a microtextured etched surface having a non-repeating, irregular textural pattern. Lumiphoric material may be applied over the microtextured surface.

A light emitting element, a method of manufacturing a light emitting element, and a display device including a light emitting element are provided. A method of manufacturing a light emitting element includes: preparing a lower panel including a substrate and a first sub conductive semiconductor layer on the substrate; forming a first mask layer including at least one mask pattern on at least a part of the lower panel to be spaced apart from each other and an opening region in which the mask patterns are spaced apart from each other; laminating a first conductive semiconductor layer, an active material layer, and a second conductive semiconductor layer on the first mask layer to form an element laminate; etching the element laminate in a vertical direction to form an element rod; and removing the mask pattern to separate the element rod from the lower panel.

An object is to provide a high-quality ScAlMgO.sub.4 single crystal and a device. The ScAlMgO.sub.4 single crystal includes Sc, Al, Mg, and O, in which the atomic percentage ratio of Mg to Al, Mg/Al (atom %/atom %), as measured by an inductively coupled plasma emission spectrometric method, is more than 1 and less than 1.1.

A nitride semiconductor ultraviolet light-emitting element 1 comprises a sapphire substrate 10 and an element structure part 20 formed on a main surface 101 of the substrate 10. In the substrate 10, in a first portion 110 extending from the main surface 101 by a first distance, a sectional area of a cross section parallel to the main surface 101 continuously increases with distance from the main surface 101, and in a second portion 120 extending from a side opposite to the main surface 101 by a second distance, a sectional area of a cross section parallel to the main surface 101 continuously increases with distance from the side opposite to the main surface 101. The sum of the first distance and the second distance is equal to or less than the thickness of the substrate 10.

A method for manufacturing a plurality of light emitting elements includes: providing a semiconductor wafer comprising: a substrate, an n-side nitride semiconductor layer containing an n-type impurity and located on the substrate, and a p-side nitride semiconductor layer containing a p-type impurity and located on the n-side nitride semiconductor layer; forming a protective layer on an upper face of the p-side nitride semiconductor layer in regions that include borders of areas to become the plurality of light emitting elements; reducing a resistance of the p-side nitride semiconductor in areas where no protective layer has been formed by annealing the semiconductor wafer; irradiating a laser beam on the substrate so as to form modified regions in the substrate; and obtaining a plurality of light emitting elements by dividing the semiconductor wafer in which the modified regions have been formed in the substrate.

A semiconductor device includes a substrate, a stress tuning layer disposed on the substrate, an aluminum nitride (AlN) buffer layer disposed on the stress tuning layer, an n-type semiconductor layer disposed on the AlN buffer layer, an active layer disposed on the n-type semiconductor layer, and a p-type semiconductor layer disposed on the active layer. The stress tuning layer has a lattice constant larger than that of the AlN buffer layer and no larger than that of the n-type semiconductor layer. A method of manufacturing the semiconductor device is also provided.

A method for manufacturing a light-emitting diode is provided, including the following steps in succession, while maintaining a substrate in a vapour-phase epitaxial growth chamber: epitaxial deposition, with an atmosphere having a first non-zero concentration of ammonia in the chamber, of a first GaN alloy layer P-doped with magnesium; epitaxial deposition, on the first GaN alloy layer, of a sacrificial GaN alloy layer in a second atmosphere in the chamber that is not supplied with magnesium; placing the second atmosphere inside the chamber under conditions with a second concentration of ammonia that is at least equal to a third of the first non-zero concentration so as to remove the sacrificial GaN layer; and then epitaxial deposition of a second N-type doped GaN alloy layer so as to form a tunnel junction with the first GaN alloy layer.

A light emitting heterostructure including a partially relaxed semiconductor layer is provided. The partially relaxed semiconductor layer can be included as a sublayer of a contact semiconductor layer of the light emitting heterostructure. A dislocation blocking structure also can be included adjacent to the partially relaxed semiconductor layer.