A nitride-based semiconductor device includes a patterned substrate having an etched surface that is formed with a plurality of protrusions, an aluminum nitride (AlN)-based film disposed on the etched surface, and a nitride-based semiconductor stacked structure disposed on the aluminum nitride-based film. Each of the protrusions has a side face. The AlN-based film includes a plurality of crystal defects formed on the side face of each protrusion. Each of the crystal defects has a width of smaller than 20 nm and/or the number of the crystal defects that are formed on the side face of each protrusion and that have a width of greater than 10 nm is less than 10. A method for preparing the semiconductor device is also disclosed.

A method of separating a wafer including rows of light emitting devices is described. Dicing streets are provided on the wafer such that a respective one of the dicing streets is provided between each of the rows of light emitting devices on the wafer. The wafer is broken along a first one of the dicing streets to separate a first portion of the wafer from a remaining portion of the wafer. The first portion of the wafer includes more than one of the rows of light emitting devices. The first portion of the wafer is broken along a second one of the dicing streets to separate a second portion of the wafer from the first portion of the wafer.

Methods for fabricating semiconductor devices incorporating an activated p-(Al,In)GaN layer include exposing a p-(Al,In)GaN layer to a gaseous composition of H.sub.2 and/or NH.sub.3 under conditions that would otherwise passivate the p-(Al,In)GaN layer. The methods do not include subjecting the p-(Al,In)GaN layer to a separate activation step in a low hydrogen or hydrogen-free environment. The methods can be used to fabricate buried activated n/p-(Al,In)GaN tunnel junctions, which can be incorporated into electronic devices.

Methods for fabricating semiconductor devices incorporating an activated p-(Al,In)GaN layer include exposing a p-(Al,In)GaN layer to a gaseous composition of H.sub.2 and/or NH.sub.3 under conditions that would otherwise passivate the p-(Al,In)GaN layer. The methods do not include subjecting the p-(Al,In)GaN layer to a separate activation step in a low hydrogen or hydrogen-free environment. The methods can be used to fabricate buried activated n/p-(Al,In)GaN tunnel junctions, which can be incorporated into electronic devices.

Integrated active-matrix light emitting pixel arrays based displays and methods of fabricating the integrated displays are provided. An example method includes: forming multiple layers on a first substrate to form a light emitting structure, integrating the light emitting structure on the first substrate with a backplane device on a second substrate by connecting a first top layer of the light emitting structure with a second top layer of the backplane device, e.g., by using low temperature bonding, the backplane device including at least one backplane having pixel circuits, and after the integration, patterning the light emitting structure to form an array of light emitting elements each conductively coupled to respective pixel circuits to thereby form an array of active-matrix light emitting pixels. A pattern of different color phosphor or different size quantum dots materials can be deposited on the light emitting pixels to form an array of multi-color display pixels.

Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having a plurality of semiconductor materials including a radiation-emitting active region. The device further includes an engineered substrate having a first material and a second material, at least one of the first material and the second material having a coefficient of thermal expansion at least approximately matched to a coefficient of thermal expansion of at least one of the plurality of semiconductor materials. At least one of the first material and the second material is positioned to receive radiation from the active region and modify a characteristic of the light.

A nitride underlayer structure includes a sputtered AlN buffer layer with open band-shaped holes, thus providing a stress release path before the nitride film is grown over the buffer layer. A light-emitting diode with such nitride underlayer structure has improved lattice quality of the nitride underlayer structure and the problem of surface cracks is resolved. A fabrication method of the nitride underlayer includes providing a substrate and forming a band-shaped material layer over the substrate; sputtering an AlN material layer over the band-shaped material layer and the substrate to form a flat film; scanning back and forth from the substrate end with a laser beam to decompose the band-shaped material layer to form a sputtered AlN buffer layer with flat surface and band-shaped holes inside; and forming an Al.sub.xIn.sub.1-x-yGa.sub.yN layer (0x1, 0y1) over the sputtered AlN buffer layer.

A light-emitting diode includes a first-type nitride region, a light-emitting region and a second-type nitride region, wherein the first-type nitride region includes a plurality of alternating first nitride layers and second nitride layers. The second nitride layers have high-doped emitting points pointing to the corresponding first nitride layer. The second-type nitride region includes a plurality of alternating third nitride layers and fourth nitride layers, wherein doping concentration of the fourth nitride layer is higher than that of the third nitride layer, and the fourth nitride layer has high-doped emitting points pointing to the third nitride layer. By adjusting thickness of the second nitride layer and the fourth nitride layer in different growth cycles, and density and form of corresponding emitting points, horizontal expansion of current in the first-type nitride region and the second-type nitride region can be greatly enhanced through alternating emitting points, thereby improving LED performance.

An alumina sintered body of the present invention has a degree of c-plane orientation of 5% or more, which is determined by a Lotgering method using an X-ray diffraction profile in a range of 2=20 to 70 obtained under X-ray irradiation, and an XRC half width of 15.0 or less in rocking curve measurement, an F content of less than 0.99 mass ppm when measured by D-SIMS, a crystal grain diameter of 15 to 200 m, and 25 or less pores having a diameter of 0.2 m to 1.0 m when a photograph of a viewing area 370.0 m in a vertical direction and 372.0 m in a horizontal direction taken at a magnification factor of 1000 is visually observed.

A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a base, a buffer layer, a mask layer and a first GaN layer. The buffer layer is disposed on the base, wherein doped regions are disposed in a portion of the surface of the buffer layer. The mask layer is disposed on the buffer layer and located on the doped regions. The first GaN layer is disposed on the buffer layer and covers the mask layer.