Patent classifications
H01L33/007
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A semiconductor structure and a manufacturing method of the semiconductor structure are provided. The semiconductor structure includes an n-type semiconductor layer, a functional layer, a p-type semiconductor layer, a first AlN layer and a first heavily doped n-type semiconductor layer arranged in sequence. The first AlN layer is provided to reduce the diffusion of p-type ions from the p-type semiconductor layer into the first heavily doped n-type semiconductor layer, to avoid a thicker tunneling junction caused by n-type ions/p-type ions co-doping, to improve the tunneling effect of carriers, to enhance the uniformity of the current density distribution of the first heavily doped n-type semiconductor layer injected into the p-type semiconductor layer, to solve the problem that the p-type semiconductor layer has low carrier mobility and high resistivity.
LIGHT-EMITTING DEVICE, DISPLAY APPARATUS INCLUDING THE SAME AND METHOD FOR MANUFACTURING THE SAME
A display apparatus includes a package substrate in which a plurality of circuit elements are disposed, wherein the package substrate includes a holder area; and a light-emitting device, wherein the light-emitting device includes: a nitride semiconductor structure including a first semiconductor layer, an active layer, and a second semiconductor layer disposed sequentially; and a passivation pattern disposed on an outer surface of the nitride semiconductor structure, wherein the first semiconductor layer includes a protrusion, the protrusion protrudes in a direction away from the active layer, wherein the protrusion is disposed in the holder area.
Light emitting diode for surface mount technology, method of manufacturing the same, and method of manufacturing light emitting diode module
A light emitting diode including a first conductive type semiconductor layer; a mesa disposed on the first conductive type semiconductor layer and including an active layer and a second conductive type semiconductor layer; an electrode disposed on the mesa and configured to be in ohmic-contact with the corresponding second conductive type semiconductor layer of the mesa, a current spreading layer disposed on the mesa and the electrode and including a first portion, a second portion, and a third portion configured to be in ohmic-contact with a first end portion, a second end portion, and a middle portion of the first conductive type semiconductor layer, respectively, an insulation layer disposed on the mesa and the first conductive type semiconductor layer and having a first region having a thickness that varies along a longitudinal direction of the first semiconductor layer.
Light-emitting device with patterned substrate
A lighting device according to embodiments of the invention includes a substrate with a plurality of holes that extend from a surface of the substrate. A non-III-nitride material is disposed within the plurality of holes. The surface of the substrate is free of the non-III-nitride material. A semiconductor structure is grown on the surface of the substrate. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region.
Light-emitting diode structure, transfer assembly, and transfer method using the same
The present invention is intended to provide a light-emitting diode (LED) structure which can be easily transferred onto another substrate, a transfer assembly whose adhesive strength with LED structures can be maintained in spite of repetitive transfer processes, LED structures and a transfer assembly for selectively transferring the LED structures, and a transfer method using the same.
RAMO4 substrate and manufacturing method thereof
A RAMO.sub.4 substrate is formed from single crystal represented by a formula of RAMO.sub.4 (in the formula, R indicates one or a plurality of trivalent elements selected from a group consisting of Sc, In, Y, and a lanthanoid element, A indicates one or a plurality of trivalent elements selected from a group consisting of Fe(III), Ga, and Al, and M indicates one or a plurality of bivalent elements selected form a group consisting of Hg, Mn, Fe(II), Co, Cu, Zn, and Cd). An epitaxially-grown surface is provided on at least one surface of the RAMO.sub.4 substrate. The epitaxially-grown surface includes a plurality of cleavage surfaces which are regularly distributed, and are separated from each other.
Monolithically integrated high voltage photovoltaics and light emitting diode with textured surface
A method of forming an electrical device that includes epitaxially growing a first conductivity type semiconductor material of a type III-V semiconductor on a semiconductor substrate. The first conductivity type semiconductor material continuously extending along an entirety of the semiconductor substrate in a plurality of triangular shaped islands; and conformally forming a layer of type III-V semiconductor material having a second conductivity type on the plurality of triangular shaped islands to provide a textured surface of a photovoltaic device. A light emitting diode is formed on the textured surface of the photovoltaic device.
Integrated vertical transistors and light emitting diodes
The present disclosure relates to semiconductor structures and, more particularly, to integrated vertical transistors and light emitting diodes and methods of manufacture. The structure includes a vertically oriented stack of material having a light emitting diode (LED) integrated with a source region and a drain region of a vertically oriented active device.
Buried activated p-(Al,In)GaN layers
Methods for fabricating semiconductor devices incorporating an activated p-(Al,In)GaN layer include exposing a p-(Al,In)GaN layer to a gaseous composition of H.sub.2 and/or NH.sub.3 under conditions that would otherwise passivate the p-(Al,In)GaN layer. The methods do not include subjecting the p-(Al,In)GaN layer to a separate activation step in a low hydrogen or hydrogen-free environment. The methods can be used to fabricate buried activated n/p-(Al,In)GaN tunnel junctions, which can be incorporated into electronic devices.
Gallium nitride materials and methods
The invention provides semiconductor materials including a gallium nitride material layer formed on a silicon substrate and methods to form the semiconductor materials. The semiconductor materials include a transition layer formed between the silicon substrate and the gallium nitride material layer. The transition layer is compositionally-graded to lower stresses in the gallium nitride material layer which can result from differences in thermal expansion rates between the gallium nitride material and the substrate. The lowering of stresses in the gallium nitride material layer reduces the tendency of cracks to form. Thus, the invention enables the production of semiconductor materials including gallium nitride material layers having few or no cracks. The semiconductor materials may be used in a number of microelectronic and optical applications.